From eccbaf6d01fb4a73c18778fa551e74960b1e0419 Mon Sep 17 00:00:00 2001
From: V3n3RiX <venerix@koprulu.sector>
Date: Thu, 11 Apr 2024 00:32:37 +0100
Subject: gentoo auto-resync : 11:04:2024 - 00:32:37

---
 dev-util/intel_clc/Manifest                |  2 +
 dev-util/intel_clc/intel_clc-24.0.5.ebuild | 86 ++++++++++++++++++++++++++++++
 2 files changed, 88 insertions(+)
 create mode 100644 dev-util/intel_clc/intel_clc-24.0.5.ebuild

(limited to 'dev-util/intel_clc')

diff --git a/dev-util/intel_clc/Manifest b/dev-util/intel_clc/Manifest
index 626d6e94093b..a77fd23423d4 100644
--- a/dev-util/intel_clc/Manifest
+++ b/dev-util/intel_clc/Manifest
@@ -1,4 +1,6 @@
 DIST mesa-24.0.4.tar.xz 20057744 BLAKE2B 6de755081f7e9dd9303af791e1a405203388787c294f8163c9d6598aa66eed1c001eeb03203c49ed8a264065458228efd849e6e59091a5963155ce8edc47c63f SHA512 1d05b07026417fbe9cf18f7b18f2db9fe5fe327555c590283d87f69bbdd51f64135928a1dbe155d750187fc268bbdbb070bc1ae9ffc3e013b8707b391969d515
+DIST mesa-24.0.5.tar.xz 20096384 BLAKE2B c4c5f493206f761a7171f19c6549dc791559a1fdbcf49aea98016f98c10f9130081a16df6b780062621495a42dc49ef5f0800bda64058e8ba60106f6a046ccef SHA512 9476af4b9ac8db5dce397084ef169927d10b28adea7e74aa5b3136810b499ac98ddf7ab564e7d1ff81c887208c8ebab3ad2d4e27e7f46136609b5c67527018eb
 EBUILD intel_clc-24.0.4.ebuild 1741 BLAKE2B b4fc7184409bedcfec1cd559149b7d57b9a5bd708cc4aea847c47573cd194804e3435a15120914fadc4bd5f9172e946d93a9164a875809feae2cc7589a36f74e SHA512 d9825be298668fb6bc933ff6131c5a2d18b76bbcb9b6ca2176512d7a4273cf42f5fe00097478a4cd3e9c678fa53c8a95f83115c4f569ac37eebe940749ba340e
+EBUILD intel_clc-24.0.5.ebuild 1742 BLAKE2B d1e9907d5bf31fad49b648899ef86805c2b6fafe656e934179f9db17cdfa9a9d9a8a94ad57c6556a4f0d02b207ea32a57db8f1dfe6c5f0f1416637dcc5064644 SHA512 f1b41578a6297a7fa7bc48c16dc8fafce59bf9b58a9131168c9d9369092b5332f31e469388b35c98b799f694e43e868eec96b23ea6b9a4f745c4546c8ffc459b
 EBUILD intel_clc-9999.ebuild 1745 BLAKE2B d4fdcb7b30f9df2f4d248452ea4377bd0615c6fc9e4ac70c7e579500c54e271dcd4754dcee09efbac50ca24b13a17122aee7b5aa65ed2db531ff1def231a0323 SHA512 2800777540b7b3718cbb9c137be4995f017453a5b9814d2225949692b7be9e6d28aa5253324e3b72251acd6fb0731294031d85a035b1257c3f183aeb8110e855
 MISC metadata.xml 388 BLAKE2B 0558cfe706987a93605fb383bc2c30ff4f4cf5837ca19afd3e16d9702ea7dcd3d575579d53aacb531e1d421c8b1692eb4607d713793a89240223c031d7781a31 SHA512 e0375912a94fa92b49ed78d9a88c4eacc8b441d8b2fa117a48df2d8a958f1cf91279299aca109e24f76b27ca04f0067f83e5b8e4141f85ac64d379bca0945d2a
diff --git a/dev-util/intel_clc/intel_clc-24.0.5.ebuild b/dev-util/intel_clc/intel_clc-24.0.5.ebuild
new file mode 100644
index 000000000000..8bc3bb53f6ba
--- /dev/null
+++ b/dev-util/intel_clc/intel_clc-24.0.5.ebuild
@@ -0,0 +1,86 @@
+# Copyright 2023-2024 Gentoo Authors
+# Distributed under the terms of the GNU General Public License v2
+
+EAPI=8
+
+LLVM_COMPAT=( 16 17 )
+PYTHON_COMPAT=( python3_{10..12} )
+
+inherit llvm-r1 meson python-any-r1
+
+MY_PV="${PV/_/-}"
+
+DESCRIPTION="intel_clc tool used for building OpenCL C to SPIR-V"
+HOMEPAGE="https://mesa3d.org/"
+
+if [[ ${PV} == 9999 ]]; then
+	S="${WORKDIR}/intel_clc-${MY_PV}"
+	EGIT_REPO_URI="https://gitlab.freedesktop.org/mesa/mesa.git"
+	inherit git-r3
+else
+	S="${WORKDIR}/mesa-${MY_PV}"
+	SRC_URI="https://archive.mesa3d.org/mesa-${MY_PV}.tar.xz"
+	KEYWORDS="~amd64"
+fi
+
+LICENSE="MIT SGI-B-2.0"
+SLOT="0"
+IUSE="debug"
+
+RDEPEND="
+	dev-libs/libclc
+	dev-util/spirv-tools
+	>=sys-libs/zlib-1.2.8:=
+	x11-libs/libdrm
+	$(llvm_gen_dep '
+		dev-util/spirv-llvm-translator:${LLVM_SLOT}
+		sys-devel/clang:${LLVM_SLOT}
+		sys-devel/llvm:${LLVM_SLOT}
+	')
+"
+DEPEND="${RDEPEND}
+	dev-libs/expat
+"
+BDEPEND="
+	${PYTHON_DEPS}
+	$(python_gen_any_dep ">=dev-python/mako-0.8.0[\${PYTHON_USEDEP}]")
+	virtual/pkgconfig
+"
+
+python_check_deps() {
+	python_has_version -b ">=dev-python/mako-0.8.0[${PYTHON_USEDEP}]"
+}
+
+pkg_setup() {
+	llvm-r1_pkg_setup
+	python-any-r1_pkg_setup
+}
+
+src_configure() {
+	PKG_CONFIG_PATH="$(get_llvm_prefix)/$(get_libdir)/pkgconfig"
+
+	local emesonargs=(
+		-Dllvm=enabled
+		-Dshared-llvm=enabled
+		-Dintel-clc=enabled
+
+		-Dgallium-drivers=''
+		-Dvulkan-drivers=''
+
+		# Set platforms empty to avoid the default "auto" setting. If
+		# platforms is empty meson.build will add surfaceless.
+		-Dplatforms=''
+
+		-Dglx=disabled
+		-Dlibunwind=disabled
+		-Dzstd=disabled
+
+		-Dbuildtype=$(usex debug debug plain)
+		-Db_ndebug=$(usex debug false true)
+	)
+	meson_src_configure
+}
+
+src_install() {
+	dobin "${BUILD_DIR}"/src/intel/compiler/intel_clc
+}
-- 
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