--- Tensile-rocm-4.3.0/pytest.ini 2021-04-22 22:35:33.000000000 +0800 +++ Tensile-rocm-4.3.0/pytest.ini 2021-09-30 17:32:21.382806851 +0800 @@ -88,6 +88,7 @@ xfail-gfx1011: architecture xfail-gfx1012: architecture xfail-gfx1030: architecture + xfail-gfx1031: architecture skip-gfx000: architecture skip-gfx900: architecture skip-gfx906: architecture @@ -97,3 +98,4 @@ skip-gfx1011: architecture skip-gfx1012: architecture skip-gfx1030: architecture + skip-gfx1031: architecture --- Tensile-rocm-4.3.0/Tensile/Common.py 2021-10-05 14:41:22.490754124 +0800 +++ Tensile-rocm-4.3.0/Tensile/Common.py 2021-09-30 17:33:19.041724015 +0800 @@ -200,7 +200,7 @@ globalParameters["MergeFiles"] = True # F=store every solution and kernel in separate file; T=store all solutions in single file globalParameters["MaxFileName"] = 64 # If a file name would be longer than this, shorten it with a hash. +globalParameters["SupportedISA"] = [(8,0,3), (9,0,0), (9,0,6), (9,0,8), (9,0,10), (10,1,0), (10,1,1), (10,1,2), (10,3,0),(10,3,1)] # assembly kernels writer supports these architectures -globalParameters["SupportedISA"] = [(8,0,3), (9,0,0), (9,0,6), (9,0,8), (9,0,10), (10,1,0), (10,1,1), (10,1,2), (10,3,0)] # assembly kernels writer supports these architectures globalParameters["GenerateManifestAndExit"] = False # Output manifest file with list of expected library objects and exit globalParameters["ClientBuildPath"] = "0_Build" # subdirectory for host code build directory @@ -265,7 +265,7 @@ 'gfx906':'vega20', 'gfx906:xnack+':'vega20', 'gfx906:xnack-':'vega20', 'gfx908':'arcturus','gfx908:xnack+':'arcturus', 'gfx908:xnack-':'arcturus', 'gfx90a':'aldebaran', 'gfx90a:xnack+':'aldebaran', 'gfx90a:xnack-':'aldebaran', + 'gfx1010':'navi10', 'gfx1011':'navi11', 'gfx1012':'navi12', 'gfx1030':'navi21', 'gfx1031':'navi22', - 'gfx1010':'navi10', 'gfx1011':'navi11', 'gfx1012':'navi12', 'gfx1030':'navi21' } def getArchitectureName(gfxName): --- Tensile-rocm-4.3.0/Tensile/KernelWriterAssembly.py 2021-04-22 22:35:33.000000000 +0800 +++ Tensile-rocm-4.3.0/Tensile/KernelWriterAssembly.py 2021-09-30 17:27:06.696711144 +0800 @@ -2257,7 +2257,7 @@ # integer i8x4 elif kernel["ProblemType"]["DataType"].isInt8x4(): + if self.version == (9,0,6) or self.version == (9,0,8) or self.version == (9,0,10) or self.version == (10,3,0) or self.version == (10,3,1): - if self.version == (9,0,6) or self.version == (9,0,8) or self.version == (9,0,10) or self.version == (10,3,0): for b in range(0, kernel["ThreadTile1"]): for a in range(0, kernel["ThreadTile0"]): for iui in range(0, innerUnroll): --- Tensile-rocm-4.3.0/Tensile/Source/CMakeLists.txt 2021-04-22 22:35:33.000000000 +0800 +++ Tensile-rocm-4.3.0/Tensile/Source/CMakeLists.txt 2021-09-30 17:29:12.846345541 +0800 @@ -51,7 +51,7 @@ endif() if(CMAKE_CXX_COMPILER STREQUAL "hipcc") + set(TENSILE_GPU_ARCHS gfx803 gfx900 gfx906:xnack- gfx908:xnack- gfx90a:xnack- gfx1010 gfx1011 gfx1012 gfx1030 gfx1031 CACHE STRING "GPU architectures") - set(TENSILE_GPU_ARCHS gfx803 gfx900 gfx906:xnack- gfx908:xnack- gfx90a:xnack- gfx1010 gfx1011 gfx1012 gfx1030 CACHE STRING "GPU architectures") else() set(TENSILE_GPU_ARCHS gfx803 gfx900 gfx906 gfx908 gfx90a CACHE STRING "GPU architectures") endif() @@ -104,7 +104,7 @@ set_property( CACHE Tensile_CODE_OBJECT_VERSION PROPERTY STRINGS V2 V3) set_property( CACHE Tensile_COMPILER PROPERTY STRINGS hipcc) set(Tensile_ARCHITECTURE all CACHE STRING "Which GPU architecture to use") + set_property( CACHE Tensile_ARCHITECTURE PROPERTY STRINGS all gfx000 gfx900 gfx906:xnack- gfx908:xnack- gfx90a:xnack- gfx1010 gfx1011 gfx1012 gfx1030 gfx1031) - set_property( CACHE Tensile_ARCHITECTURE PROPERTY STRINGS all gfx000 gfx900 gfx906:xnack- gfx908:xnack- gfx90a:xnack- gfx1010 gfx1011 gfx1012 gfx1030) set_property( CACHE Tensile_LIBRARY_FORMAT PROPERTY STRINGS yaml msgpack) message( STATUS "Tensile_CODE_OBJECT_VERSION from Tensile/Source/CMakeLists.txt: ${Tensile_CODE_OBJECT_VERSION}") @@ -206,7 +206,7 @@ ${Tensile_RUNTIME_LANGUAGE} # HIP or OCL ${Tensile_COMPILER} # hipcc ${Tensile_CODE_OBJECT_VERSION} # V2 or V3 + ${Tensile_ARCHITECTURE} # all, gfx000, gfx803, gfx900, gfx906:xnack-, gfx908:xnack-, gfx90a:xnack-, gfx1010, gfx1011, gfx1012, gfx1030, gfx1031 - ${Tensile_ARCHITECTURE} # all, gfx000, gfx803, gfx900, gfx906:xnack-, gfx908:xnack-, gfx90a:xnack-, gfx1010, gfx1011, gfx1012, gfx1030 ${Tensile_LIBRARY_FORMAT} # yaml or msgpack ${Tensile_MERGE_FILES} # ON or OFF ${Tensile_SHORT_FILE_NAMES} # ON or OFF --- Tensile-rocm-4.3.0/Tensile/Source/lib/include/Tensile/AMDGPU.hpp 2021-04-22 22:35:33.000000000 +0800 +++ Tensile-rocm-4.3.0/Tensile/Source/lib/include/Tensile/AMDGPU.hpp 2021-09-30 17:48:11.277066515 +0800 @@ -62,7 +62,8 @@ gfx1010 = 1010, gfx1011 = 1011, gfx1012 = 1012, + gfx1030 = 1030, + gfx1031 = 1031 - gfx1030 = 1030 }; AMDGPU(); --- Tensile-rocm-4.3.0/Tensile/Source/lib/include/Tensile/Serialization/Predicates.hpp 2021-04-22 22:35:33.000000000 +0800 +++ Tensile-rocm-4.3.0/Tensile/Source/lib/include/Tensile/Serialization/Predicates.hpp 2021-09-30 17:31:26.075845249 +0800 @@ -215,6 +215,7 @@ iot::enumCase(io, value, "gfx1011", AMDGPU::Processor::gfx1011); iot::enumCase(io, value, "gfx1012", AMDGPU::Processor::gfx1012); iot::enumCase(io, value, "gfx1030", AMDGPU::Processor::gfx1030); + iot::enumCase(io, value, "gfx1031", AMDGPU::Processor::gfx1031); } }; } // namespace Serialization --- Tensile-rocm-4.3.0/Tensile/Source/lib/source/AMDGPU.cpp 2021-04-22 22:35:33.000000000 +0800 +++ Tensile-rocm-4.3.0/Tensile/Source/lib/source/AMDGPU.cpp 2021-09-30 17:31:45.195486318 +0800 @@ -82,6 +82,8 @@ return stream << "gfx1012"; case AMDGPU::Processor::gfx1030: return stream << "gfx1030"; + case AMDGPU::Processor::gfx1031: + return stream << "gfx1031"; } return stream; } --- Tensile-rocm-4.3.0/Tensile/Source/TensileCreateLibrary.cmake 2021-04-22 22:35:33.000000000 +0800 +++ Tensile-rocm-4.3.0/Tensile/Source/TensileCreateLibrary.cmake 2021-09-30 17:29:24.766121912 +0800 @@ -138,7 +138,7 @@ add_library(Tensile ${options} ${Tensile_SOURCE_FILES}) # specify gpu targets if( Tensile_ARCHITECTURE MATCHES "all" ) + set( Tensile_HIP_ISA "gfx803" "gfx900" "gfx906" "gfx908" "gfx1010" "gfx1011" "gfx1012" "gfx1030", "gfx1031") - set( Tensile_HIP_ISA "gfx803" "gfx900" "gfx906" "gfx908" "gfx1010" "gfx1011" "gfx1012" "gfx1030") else() set( Tensile_HIP_ISA ${Tensile_ARCHITECTURE}) endif()