gentoo auto-resync : 27:06:2024 - 07:59:39

9 files changed, 492 insertions, 67 deletions

diff --git a/dev-libs/rocm-comgr/Manifest b/dev-libs/rocm-comgr/Manifest
index 78045596bbf7..5792dd8a6a5b 100644
--- a/dev-libs/rocm-comgr/Manifest
+++ b/dev-libs/rocm-comgr/Manifest
@@ -26,16 +26,21 @@ AUX rocm-comgr-5.7.0-symbolizer.patch 1503 BLAKE2B fa8071ad2bbcd0ab4e6f05260617c
 AUX rocm-comgr-5.7.1-correct-license-install-dir.patch 549 BLAKE2B c45452d4af4718aca315862064596347f5caa9301a02fb14228daa72fee70d7452d3f24ee7dfc9247433388655ec7cccf3168eeea17ce425bd2090230e57e451 SHA512 8a49aec20da6c35989fbafc985b9c3bc21f20b711e2bd6921b67542f83cf07557afffefc9dafa860eefea5db17203d7a064755059e6e16d2c083b09ef01e9a22
 AUX rocm-comgr-5.7.1-fix-tests-rocm-path.patch 651 BLAKE2B bddf164466fcd2d9066f9dba6cd557b6afa4023af60b21e0fa15729fae193b78f4632f5bb3fd7cdfa05a97b0179d63cd2d1baad00858da3a90ec76a7c0d65a88 SHA512 29a4b9bde355b2c8e776a2e11515576da28ca7895c2ca910482a758cba1b80fa034fb6a6d729d1730f8658e1c01ba8fe39dac88f190edcd7733969f6f85b5456
 AUX rocm-comgr-5.7.1-fix-tests.patch 1733 BLAKE2B 0b92d01929fd0376ef33dfca3dd2e43956a3652c9c653b3e30ddb3d7487caf8858367447270328c2ff6d9963d786c8ae50cc21efc90e9a9594bb9f50ecec5667 SHA512 181074ecd0a76f6dfabf476bbe98e399caec4e8b3dd04b01318dbfa34253ee5c27f28296f1f07801960b5b3abab1d07dac18e8e61d1e30971520c7df77364607
+AUX rocm-comgr-6.0.0-extend-isa-compatibility-check.patch 6555 BLAKE2B 5ef7b96754749b0dd0d1b18dbdc3377d51e87dde560d4c4ba2f9f521b62a46de4c8329c8a40316efa59d66c916872308504e5bc82d322de399438442016af392 SHA512 736365c111853d28e8d3277946abf50d97b76900f833d2d66e36830d57d6cfb3346d628a6ed5c21d560ca992f716d3fe38b72eef0f53f30c162dc3fa95985fec
+AUX rocm-comgr-6.1.0-dont-add-nogpulib.patch 1020 BLAKE2B e99408ab32428b7a320d10f3431f8328865c345366610f2e76588ed04cab088702fa0cd4dcdb5ac5c608d50d1c8d1ffafe93e415c0c7a23c3f63254a2952672d SHA512 b5d42c366b1efefe264ee4ce4b20b925a82131f2e7ca57c736f868fdf823d2d93f0d69381c5258faee668f5e12c7ef0e6a6781972b876a303b825c32953459b9
+AUX rocm-comgr-6.1.0-enforce-oop-compiler.patch 996 BLAKE2B c4c0bfe9bf55f2f4e8661f01ed1b2ec03f4c07691facad063cc03bda2599fcc94648549a829694b7e5f6d4b82d42f7c92e1ce8cea9e934f37b62f7beda4dd48f SHA512 97f850115b8cdd2c5a2091ca26cc40b9e13cfa86a7980f7730c55932b6db254580f86f267ce7a2b3af739210db55faa29e06e57bdbc11eaa9cfa08d3e4929ea9
+AUX rocm-comgr-6.1.0-fix-comgr-default-flags.patch 1967 BLAKE2B c71628e83827738d2458a69a27fb44fbcba44ca6633e9a6856406627b0b4451b996876cc8e86c46382f40006efe472488d2b81ed3571d48e18505eb4fe9b673a SHA512 c85715e427a10f92eb91d6cdb7bd4b455371694b1a87429978e82b9f5127e37710558795541a616395e29735ac57325f3c094ba8c40badb6612aea6865ac4ffa
+AUX rocm-comgr-6.1.0-llvm-18-compat.patch 2990 BLAKE2B cf3c2ca3933ad714de6d98404a9d97bcca98ba7536228ad7e1396c0e4a8cc6b88b7bba12857e599f96d9fde3d37033a9a9c7c123c230d4af3b5d942206af0941 SHA512 f36e2d6b16f78e93a8291f914d122dfd917aeb0d09e1545f44cb16ab0f064710d450b4e7aa24b6b2ee374c29821d464f878efcc1660e00456118c839e89b31a0
+DIST llvm-project-rocm-6.1.1.tar.gz 196027084 BLAKE2B 3ef0b6e3c47c66fd80289373e6ff8aaff44751f9b380addfae73a18dc388093c0535f230b0cc7528724bc43f6992e2ae6decd3d0d3c700893ca95a6166b7b8dc SHA512 e320d4eeaa6f61ed1cdbf653d67fe887d3ce9dc0d6743b4713502e1cb5318ab8afbe1ee71f8cba07635c54ce532df6683de40ade0e5be4a52e50ce25a9b70818
 DIST rocm-comgr-5.1.3.tar.gz 117155 BLAKE2B 40e415c4c7ae3e709dd50981299291f0fc1133f35310b4c86a86847d3bce5fd7685a3f4480f8f156873ca922921c1d4e1cb620fd33bd5cdc87f155af839f2bbe SHA512 5927250f5e03c32b7f270a1dbfe5221d349dfe32aba34143040da53d4e7eb83faa3073a43edabcff13e1fc977bc17088404523f2ab2ea95e207d2c00beb4249b
 DIST rocm-comgr-5.3.3.tar.gz 120414 BLAKE2B 29b9d466d74ef94165a2b9bea35eac4616f6b2fc529cdac3c830ee7dc08f219cb9e5d4f081658881c76633f12eaebb74d1a2ea30a76652231b8ee516f9988db1 SHA512 ba7b1ef214e3624168e438ed7fd94291a07508fe89d178c0b158bf22e0998d5a8e4d8f0a7f08f05ac108ef65f725db5764fd66353a85bc25000e572a4fdcb61f
 DIST rocm-comgr-5.4.3.tar.gz 120461 BLAKE2B c4eb79dd5a72a2b18e16841fc8cb9a3a33efb0c7b04a7585df9672d682bba6fa826ab8b37dba5febca3b8c5ee5aca30d8546e1fa69e77671e5c750e2a8c1f12f SHA512 1a25af99a0166d70ca6dc5df5a667068eaf583dccd74bbb18a2a5de3c1b769e0c1eb9a0c539e0cd88bc50bbbe53214a1d1b23fbdfd6fc5b6507c44da259815c4
 DIST rocm-comgr-5.5.1.tar.gz 127475 BLAKE2B dbcb6729b27c0b4a4be37f5e462d96b10c15a6a3b540a81a74a648fc45dc727ea5706db1a0f4583a31ac4cb5c9f0d9f4e258fa5ac792b327f4cb1dfe6d585937 SHA512 09174ef2ad21f62b197e439bb5b04a365233c360c57cc2ccf0ea3d53edfa8880dff4f127c6d6c1d430b63b6f7ea666705b14cadc2bccb89c0fefed943b0cf1c7
 DIST rocm-comgr-5.7.1.tar.gz 137923 BLAKE2B e215f51137fd0c4b67e85496bf289dc0afde6ebc9efb9416f5fc4cf312b2be9be26da35cb70965bf4857a0f1434d750bcc03ce83095173098487ef7805948735 SHA512 cdd2609b858d9503c30122a2d328d36baa8a930a05bcb6c38e30723909c492b4d47eaaf4884dbb7aa82053e7cda6c22ee1aa16fc5ba266e272d98ff772c5079d
-DIST rocm-comgr-6.0.0.tar.gz 142129 BLAKE2B 65d00a79ead48872e3b94e5239a07c476288c611aa3ce2311a345bec5f7d277dc67910fa5f4ef000a5e94e6bed148baa4b1c7fe2b1cfaae2cc39555d716668d5 SHA512 877d2042bdafa6b503ee8f24d3a9c4ac9e001a7884211df47b2237d8a5ead66ced0f352c7b76d96190cd407461f5434fb1a5a4508067e432eb93c0f2fd066053
 EBUILD rocm-comgr-5.1.3-r3.ebuild 2051 BLAKE2B 98d8ad8164c8a401961a9abb1a973e1123a049c4a3949114f3493d36f02cd5f2048554828cf5838c00c47a128e21420ba7cf6c3de29086b918e56c5fe79410f7 SHA512 8341569140712543b778a771a381933a9cd14c0a5dcf3393e196d0121eb14a01614bf2080df2cd1f5a51b5bb3f5fb55dae9b7bddc4954900a64d5af0443e3a0f
 EBUILD rocm-comgr-5.3.3-r2.ebuild 1943 BLAKE2B e286731895a9cb985eef52ab23fea988d11fc4294fc65c91b9dc81ec5af8c5a747ae699a6af878436e8260c77e94402593fccae9dd8fdd65f05c3da27087b82f SHA512 fd5a47cb1eb354078c9aa4f5fc27d05629a7f40984e9f166a36a5d47faf8ccf3321d8a326145e192c25cc685ed041e9c756b7e57598902acc07c743ea0c7cc3c
 EBUILD rocm-comgr-5.4.3-r1.ebuild 1892 BLAKE2B 3225c9fc2eb31f8810e1072ccf20681987ed6d8072f7bb0a1d661ab2eb327ad30afa0a6fd8f8299bd626f34cffd25e9f15d42a5e7fb6ac62f314755ce1ca3116 SHA512 265cd1523b8dc85a875a008cb8a2b6b3098cc07277199c3cccb749f4a30d22d8e71eefba1474aad18034b13002d734b46cec614f1fe56e67c4482dbeb8bc0079
 EBUILD rocm-comgr-5.5.1.ebuild 2022 BLAKE2B 7bc047bb17510907af10ce3763ccc6bd52d1bccb4264bd920936dd76d9e7040565b041ed4f6422ca858a40f8c1f073a8bcec5d9b93bea947e72aa48091cf3f6a SHA512 31024125b88958a422fec60cb35eb2aa7f3c9ec0862c2f218f8b6c7ce1ccc3515f3976de53d79715c6e3bcbb3fccc6ee4347013e711379702c88b1ebdee894bf
 EBUILD rocm-comgr-5.7.1.ebuild 2027 BLAKE2B 681d9335d5117a6db725a36f9d56b41c5987db306baacccfb7f31dcf3166ab6fba4c469c78f754a90385b53a827ca41100fa8428b5b6ab41e84e03b178f33f9f SHA512 49f0471a685b324bcef68ac534e76d4d44ec60abadc6ebfc293afb5bb457235a949c5213f2f0d21dfe25d33e5f366bb219a83c10a80dc99e50627af79be65406
-EBUILD rocm-comgr-6.0.0.ebuild 1951 BLAKE2B 7129f908ca36c54c3ffc69be5f4b58b55308d5a76dc9d1a1095379098d215726a4be033f28c27ec9938054d13f6c8e853206939717691c419654666ad5807efa SHA512 d470c4e665f0d0259fd508304d8770f3243ea721f4259a4267970d48ed08f6163e61e7f02caae553f29d110b24f3a0a61b7fce1c1e529f00af5ef5e41bf2e746
-MISC metadata.xml 526 BLAKE2B d2c4b5c4210cd4ae436bc205ec6c6d0e2690edc99250e508b64f3abbf0f7b4a61b27cb627d9453ff6432cd683fb7f51460b4e821ce7614880e68854121297db5 SHA512 5cf80a58a6791b404d33577fa1cd199791ad4348d0e18d2ba9d8e1665cfc5a19c7d37cfe265c77c060bc886f24ce28b592c6b7d541531faaf62e5440b732d2e7
+EBUILD rocm-comgr-6.1.1.ebuild 2403 BLAKE2B 1fa1bbbd80818a96d66418a1e5c575daa77055b4dd39f82579c6e902bbbff8e61158683ea1e449c2e831f0f367fcfcc6ff81c732221470c3f4915daf0717d70e SHA512 f28526ae247fb2161a2e6732817d49c5577fdda3ade0cc5498f3b17ed2c50666c4f7f7a342bdd595c01e4ba7c80d725fb32ee69d2ae63d6d48f0bf32f7be1fb9
+MISC metadata.xml 638 BLAKE2B d2396daa1a9e505ff3fc3b7a2465f4ca5c933ac8609c08732513c30ebb715f244681075b8b415b75a0d0c330144cb6fab483e6b4231b1144c3bf3bc5091693f3 SHA512 da41a365f6d75e8feabed3a54ca117a8406cabec215137751280ab5985ab86e178a14183e804af220b49b83d4084489c1ec1dd1d543aaa585d910b6636b866c4
diff --git a/dev-libs/rocm-comgr/files/rocm-comgr-6.0.0-extend-isa-compatibility-check.patch b/dev-libs/rocm-comgr/files/rocm-comgr-6.0.0-extend-isa-compatibility-check.patch
new file mode 100644
index 000000000000..e65400c792e4
--- /dev/null
+++ b/dev-libs/rocm-comgr/files/rocm-comgr-6.0.0-extend-isa-compatibility-check.patch
@@ -0,0 +1,204 @@
+Load kernels when compatible by ISA, e. g. if AMDGPU_TARGETS is set
+to gfx1030 and some application was started on gfx1036, it loads gfx1030 kernel.
+
+Based on Debian patch by Cordell Bloor <cgmb@slerp.xyz>
+https://salsa.debian.org/rocm-team/rocm-hipamd/-/blob/master/debian/patches/0026-extend-hip-isa-compatibility-check.patch
+--- comgr.orig/src/comgr-metadata.cpp
++++ comgr/src/comgr-metadata.cpp
+@@ -923,23 +923,86 @@ static constexpr const char *CLANG_OFFLOAD_BUNDLER_MAGIC =
+ static constexpr size_t OffloadBundleMagicLen =
+     strLiteralLength(CLANG_OFFLOAD_BUNDLER_MAGIC);
+ 
+-bool isCompatibleIsaName(StringRef IsaName, StringRef CodeObjectIsaName) {
++struct GfxPattern {
++  std::string root;
++  std::string suffixes;
++};
++
++static bool matches(const GfxPattern& p, StringRef s) {
++  if (p.root.size() + 1 != s.size()) {
++    return false;
++  }
++  if (0 != std::memcmp(p.root.data(), s.data(), p.root.size())) {
++    return false;
++  }
++  return p.suffixes.find(s[p.root.size()]) != std::string::npos;
++}
++
++static bool isGfx900EquivalentProcessor(StringRef processor) {
++  return matches(GfxPattern{"gfx90", "029c"}, processor);
++}
++
++static bool isGfx900SupersetProcessor(StringRef processor) {
++  return matches(GfxPattern{"gfx90", "0269c"}, processor);
++}
++
++static bool isGfx1030EquivalentProcessor(StringRef processor) {
++  return matches(GfxPattern{"gfx103", "0123456"}, processor);
++}
++
++static bool isGfx1010EquivalentProcessor(StringRef processor) {
++  return matches(GfxPattern{"gfx101", "0"}, processor);
++}
++
++static bool isGfx1010SupersetProcessor(StringRef processor) {
++  return matches(GfxPattern{"gfx101", "0123"}, processor);
++}
++
++enum CompatibilityScore {
++  CS_EXACT_MATCH           = 1 << 4,
++  CS_PROCESSOR_MATCH       = 1 << 3,
++  CS_PROCESSOR_COMPATIBLE  = 1 << 2,
++  CS_XNACK_SPECIALIZED     = 1 << 1,
++  CS_SRAM_ECC_SPECIALIZED  = 1 << 0,
++  CS_INCOMPATIBLE          = 0,
++};
++
++static int getProcessorCompatibilityScore(StringRef CodeObjectProcessor,
++                                          StringRef AgentProcessor) {
++  if (CodeObjectProcessor == AgentProcessor) {
++    return CS_PROCESSOR_MATCH;
++  }
++
++  bool compatible = false;
++  if (isGfx900SupersetProcessor(AgentProcessor)) {
++    compatible = isGfx900EquivalentProcessor(CodeObjectProcessor);
++  } else if (isGfx1010SupersetProcessor(AgentProcessor)) {
++    compatible = isGfx1010EquivalentProcessor(CodeObjectProcessor);
++  } else if (isGfx1030EquivalentProcessor(AgentProcessor)) {
++    compatible = isGfx1030EquivalentProcessor(CodeObjectProcessor);
++  }
++
++  return compatible ? CS_PROCESSOR_COMPATIBLE : CS_INCOMPATIBLE;
++}
++
++static int getCompatiblityScore(StringRef IsaName, StringRef CodeObjectIsaName) {
+   if (IsaName == CodeObjectIsaName) {
+-    return true;
++    return CS_EXACT_MATCH;
+   }
+ 
+   TargetIdentifier CodeObjectIdent;
+   if (parseTargetIdentifier(CodeObjectIsaName, CodeObjectIdent)) {
+-    return false;
++    return CS_INCOMPATIBLE;
+   }
+ 
+   TargetIdentifier IsaIdent;
+   if (parseTargetIdentifier(IsaName, IsaIdent)) {
+-    return false;
++    return CS_INCOMPATIBLE;
+   }
+ 
+-  if (CodeObjectIdent.Processor != IsaIdent.Processor) {
+-    return false;
++  int ProcessorScore = getProcessorCompatibilityScore(CodeObjectIdent.Processor, IsaIdent.Processor);
++  if (ProcessorScore == CS_INCOMPATIBLE) {
++    return CS_INCOMPATIBLE;
+   }
+ 
+   char CodeObjectXnack = ' ', CodeObjectSramecc = ' ';
+@@ -963,18 +1026,23 @@ bool isCompatibleIsaName(StringRef IsaName, StringRef CodeObjectIsaName) {
+     }
+   }
+ 
++  int XnackBonus = 0;
+   if (CodeObjectXnack != ' ') {
+     if (CodeObjectXnack != IsaXnack) {
+-      return false;
++      return CS_INCOMPATIBLE;
+     }
++    XnackBonus = CS_XNACK_SPECIALIZED;
+   }
+ 
++  int SrameccBonus = 0;
+   if (CodeObjectSramecc != ' ') {
+     if (CodeObjectSramecc != IsaSramecc) {
+-      return false;
++      return CS_INCOMPATIBLE;
+     }
++    SrameccBonus = CS_SRAM_ECC_SPECIALIZED;
+   }
+-  return true;
++
++  return ProcessorScore + XnackBonus + SrameccBonus;
+ }
+ 
+ amd_comgr_status_t
+@@ -992,14 +1060,21 @@ lookUpCodeObjectInSharedObject(DataObject *DataP,
+     return Status;
+   }
+ 
++  int MaxScore = 0;
++  unsigned MaxScoreItem;
+   for (unsigned J = 0; J < QueryListSize; J++) {
+-    if (isCompatibleIsaName(QueryList[J].isa, IsaName)) {
+-      QueryList[J].offset = 0;
+-      QueryList[J].size = DataP->Size;
+-      break;
++    int Score = getCompatiblityScore(QueryList[J].isa, IsaName);
++    if (Score > MaxScore) {
++      MaxScore = Score;
++      MaxScoreItem = J;
+     }
+   }
+ 
++  if (MaxScore) {
++    QueryList[MaxScoreItem].offset = 0;
++    QueryList[MaxScoreItem].size = DataP->Size;
++  }
++
+   return AMD_COMGR_STATUS_SUCCESS;
+ }
+ 
+@@ -1011,7 +1086,6 @@ amd_comgr_status_t lookUpCodeObject(DataObject *DataP,
+     return lookUpCodeObjectInSharedObject(DataP, QueryList, QueryListSize);
+   }
+ 
+-  int Seen = 0;
+   BinaryStreamReader Reader(StringRef(DataP->Data, DataP->Size),
+                             support::little);
+ 
+@@ -1037,6 +1111,8 @@ amd_comgr_status_t lookUpCodeObject(DataObject *DataP,
+     QueryList[I].size = 0;
+   }
+ 
++  std::vector<int> QueryListScores(QueryListSize);
++
+   // For each code object, extract BundleEntryID information, and check that
+   // against each ISA in the QueryList
+   for (uint64_t I = 0; I < NumOfCodeObjects; I++) {
+@@ -1069,28 +1145,22 @@ amd_comgr_status_t lookUpCodeObject(DataObject *DataP,
+     }
+ 
+     for (unsigned J = 0; J < QueryListSize; J++) {
+-      // If this QueryList item has already been found to be compatible with
++      // If this QueryList item has exact match with
+       // another BundleEntryID, no need to check against the current
+       // BundleEntryID
+-      if (QueryList[J].size != 0) {
++      if (QueryListScores[J] == CS_EXACT_MATCH) {
+         continue;
+       }
+ 
+       // If the QueryList Isa is compatible with the BundleEntryID, set the
+       // QueryList offset/size to this BundleEntryID
+-      if (isCompatibleIsaName(QueryList[J].isa, OffloadAndTargetId.second)) {
++      int Score = getCompatiblityScore(QueryList[J].isa, OffloadAndTargetId.second);
++      if (Score > QueryListScores[J]) {
++        QueryListScores[J] = Score;
+         QueryList[J].offset = BundleEntryCodeObjectOffset;
+         QueryList[J].size = BundleEntryCodeObjectSize;
+-        Seen++;
+-        break;
+       }
+     }
+-
+-    // Stop iterating over BundleEntryIDs once we have populated the entire
+-    // QueryList
+-    if (Seen == (int) QueryListSize) {
+-      break;
+-    }
+   }
+ 
+   return AMD_COMGR_STATUS_SUCCESS;
diff --git a/dev-libs/rocm-comgr/files/rocm-comgr-6.1.0-dont-add-nogpulib.patch b/dev-libs/rocm-comgr/files/rocm-comgr-6.1.0-dont-add-nogpulib.patch
new file mode 100644
index 000000000000..526318f5bbd9
--- /dev/null
+++ b/dev-libs/rocm-comgr/files/rocm-comgr-6.1.0-dont-add-nogpulib.patch
@@ -0,0 +1,31 @@
+From 179ec2e67bf882c6bccb27f81db3d80f7eb9946e Mon Sep 17 00:00:00 2001
+From: Jacob Lambert <jacob.lambert@amd.com>
+Date: Fri, 12 Apr 2024 13:56:42 -0700
+Subject: [PATCH] [Comgr] Don't add -nogpulib option for assembley action
+
+We can omit setting -nogpulib even without a -rocm-path=. option
+when calling the assembly action. This avoids the following warning:
+
+warning: argument unused during compilation: '-nogpulib'
+Change-Id: I66d512befbafd9382f050c45a0d3950985e8ae38
+---
+ amd/comgr/src/comgr-compiler.cpp | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/src/comgr-compiler.cpp b/src/comgr-compiler.cpp
+index 143ab4e4f3db..21b233fa94b2 100644
+--- a/src/comgr-compiler.cpp
++++ b/src/comgr-compiler.cpp
+@@ -1758,6 +1758,9 @@ amd_comgr_status_t AMDGPUCompiler::assembleToRelocatable() {
+   Args.push_back("-x");
+   Args.push_back("assembler");
+ 
++  // -nogpulib option not needed for assembling to relocatable
++  NoGpuLib = false;
++
+   return processFiles(AMD_COMGR_DATA_KIND_RELOCATABLE, ".o");
+ }
+ 
+-- 
+2.44.0
+
diff --git a/dev-libs/rocm-comgr/files/rocm-comgr-6.1.0-enforce-oop-compiler.patch b/dev-libs/rocm-comgr/files/rocm-comgr-6.1.0-enforce-oop-compiler.patch
new file mode 100644
index 000000000000..99cbf2f22ce6
--- /dev/null
+++ b/dev-libs/rocm-comgr/files/rocm-comgr-6.1.0-enforce-oop-compiler.patch
@@ -0,0 +1,26 @@
+In-process compilation breaks compile_source_to_executable test, as it attempts to
+build .so as fatbin, and some options does not work with unpatched LLVM.
+--- a/src/comgr-compiler.cpp
++++ b/src/comgr-compiler.cpp
+@@ -1226,10 +1226,7 @@ amd_comgr_status_t AMDGPUCompiler::compileToFatBin() {
+     return AMD_COMGR_STATUS_ERROR_INVALID_ARGUMENT;
+   }
+ 
+-  // This is a workaround to support HIP OOP Fatbin Compilation
+-  CompileOOP = true;
+   auto Status = processFiles(AMD_COMGR_DATA_KIND_FATBIN, ".fatbin");
+-  CompileOOP = false;
+ 
+   return Status;
+ }
+--- a/src/comgr-compiler.h
++++ b/src/comgr-compiler.h
+@@ -102,7 +102,7 @@ class AMDGPUCompiler {
+   std::string ClangIncludePath;
+   std::string ClangIncludePath2;
+   /// Perform out-of-process compilation.
+-  bool CompileOOP = false;
++  bool CompileOOP = true;
+   /// Precompiled header file paths.
+   llvm::SmallVector<llvm::SmallString<128>, 2> PrecompiledHeaders;
+   /// Arguments common to all driver invocations in the current action.
diff --git a/dev-libs/rocm-comgr/files/rocm-comgr-6.1.0-fix-comgr-default-flags.patch b/dev-libs/rocm-comgr/files/rocm-comgr-6.1.0-fix-comgr-default-flags.patch
new file mode 100644
index 000000000000..d885da08ddae
--- /dev/null
+++ b/dev-libs/rocm-comgr/files/rocm-comgr-6.1.0-fix-comgr-default-flags.patch
@@ -0,0 +1,51 @@
+Remove HIP/ROCM includes ("-isystem /usr/include"), as they break inclusion of <math.h>.
+Add inclusion of Clang resource dir (e.g. /usr/lib/clang/17), as it is used in hip runtime like that.
+Remove hardcoded target to fix HIP on musl.
+
+Issues:
+* https://github.com/ROCm/clr/issues/82
+* https://github.com/ROCm/llvm-project/issues/92
+--- a/src/comgr-compiler.cpp
++++ b/src/comgr-compiler.cpp
+@@ -1028,9 +1028,8 @@ AMDGPUCompiler::addTargetIdentifierFlags(llvm::StringRef IdentStr,
+ }
+ 
+ amd_comgr_status_t AMDGPUCompiler::addCompilationFlags() {
+-  HIPIncludePath = (Twine(env::getHIPPath()) + "/include").str();
+-  // HIP headers depend on hsa.h which is in ROCM_DIR/include.
+-  ROCMIncludePath = (Twine(env::getROCMPath()) + "/include").str();
++  // Allow to include <include/cuda_wrappers/algorithm> (used in some hip files)
++  ClangIncludePath = @CLANG_RESOURCE_DIR@;
+ 
+   Args.push_back("-x");
+ 
+@@ -1051,13 +1050,9 @@ amd_comgr_status_t AMDGPUCompiler::addCompilationFlags() {
+   case AMD_COMGR_LANGUAGE_HIP:
+     Args.push_back("hip");
+     Args.push_back("-std=c++11");
+-    Args.push_back("-target");
+-    Args.push_back("x86_64-unknown-linux-gnu");
+     Args.push_back("--cuda-device-only");
+     Args.push_back("-isystem");
+-    Args.push_back(ROCMIncludePath.c_str());
+-    Args.push_back("-isystem");
+-    Args.push_back(HIPIncludePath.c_str());
++    Args.push_back(ClangIncludePath.c_str());
+     break;
+   default:
+     return AMD_COMGR_STATUS_ERROR_INVALID_ARGUMENT;
+--- a/src/comgr-compiler.h
++++ b/src/comgr-compiler.h
+@@ -95,12 +95,7 @@ class AMDGPUCompiler {
+   /// User supplied target GPU Arch.
+   std::string GPUArch;
+   std::string OffloadArch;
+-  /// ROCM include Path
+-  std::string ROCMIncludePath;
+-  /// HIP and Clang Include Paths
+-  std::string HIPIncludePath;
+   std::string ClangIncludePath;
+-  std::string ClangIncludePath2;
+   /// Perform out-of-process compilation.
+   bool CompileOOP = false;
+   /// Precompiled header file paths.
diff --git a/dev-libs/rocm-comgr/files/rocm-comgr-6.1.0-llvm-18-compat.patch b/dev-libs/rocm-comgr/files/rocm-comgr-6.1.0-llvm-18-compat.patch
new file mode 100644
index 000000000000..df008e4230d7
--- /dev/null
+++ b/dev-libs/rocm-comgr/files/rocm-comgr-6.1.0-llvm-18-compat.patch
@@ -0,0 +1,79 @@
+ROCm 6.0.0 and 6.0.2 releases use mix between LLVM 17 and 18
+forked as https://github.com/RadeonOpenCompute/llvm-project
+which makes some libraries compatible with LLVM 17,
+while other require LLVM 18.
+
+Backports:
+* https://github.com/ROCm/llvm-project/commit/6cbc4dc91dfeb1cf2295cb350866e0b3a07dfee4
+* https://github.com/ROCm/llvm-project/commit/179ec2e67bf882c6bccb27f81db3d80f7eb9946e
+* https://github.com/ROCm/llvm-project/commit/ee123c3d1706bc4346511b1a9032020782576350
+--- a/src/comgr-compiler.cpp
++++ b/src/comgr-compiler.cpp
+@@ -205,7 +205,11 @@ bool AssemblerInvocation::createFromArgs(AssemblerInvocation &Opts,
+   // Parse the arguments.
+   const OptTable &OptTbl = getDriverOptTable();
+ 
++#if LLVM_VERSION_MAJOR == 17
+   const unsigned IncludedFlagsBitmask = options::CC1AsOption;
++#else
++  llvm::opt::Visibility IncludedFlagsBitmask(options::CC1AsOption);
++#endif
+   unsigned MissingArgIndex, MissingArgCount;
+   InputArgList Args = OptTbl.ParseArgs(Argv, MissingArgIndex, MissingArgCount,
+                                        IncludedFlagsBitmask);
+@@ -1041,11 +1045,15 @@ amd_comgr_status_t AMDGPUCompiler::addCompilationFlags() {
+     Args.push_back("cl");
+     Args.push_back("-std=cl1.2");
+     Args.push_back("-cl-no-stdinc");
++    Args.push_back("-mllvm");
++    Args.push_back("-amdgpu-internalize-symbols");
+     break;
+   case AMD_COMGR_LANGUAGE_OPENCL_2_0:
+     Args.push_back("cl");
+     Args.push_back("-std=cl2.0");
+     Args.push_back("-cl-no-stdinc");
++    Args.push_back("-mllvm");
++    Args.push_back("-amdgpu-internalize-symbols");
+     break;
+   case AMD_COMGR_LANGUAGE_HIP:
+     Args.push_back("hip");
+@@ -1605,6 +1613,9 @@ amd_comgr_status_t AMDGPUCompiler::assembleToRelocatable() {
+   Args.push_back("-x");
+   Args.push_back("assembler");
+ 
++  // -nogpulib option not needed for assembling to relocatable
++  NoGpuLib = false;
++
+   return processFiles(AMD_COMGR_DATA_KIND_RELOCATABLE, ".o");
+ }
+ 
+--- a/src/comgr-metadata.cpp
++++ b/src/comgr-metadata.cpp
+@@ -1087,7 +1087,12 @@ amd_comgr_status_t lookUpCodeObject(DataObject *DataP,
+   }
+ 
+   BinaryStreamReader Reader(StringRef(DataP->Data, DataP->Size),
+-                            support::little);
++#if LLVM_VERSION_MAJOR == 17
++                            support::little
++#else
++                            llvm::endianness::little
++#endif
++                            );
+ 
+   StringRef Magic;
+   if (auto EC = Reader.readFixedString(Magic, OffloadBundleMagicLen)) {
+--- a/test/compile_log_remarks_test.c
++++ b/test/compile_log_remarks_test.c
+@@ -107,7 +107,11 @@ int main(int argc, char *argv[]) {
+              AMD_COMGR_DATA_KIND_SOURCE, 1);
+ 
+   checkLogs("AMD_COMGR_ACTION_CODEGEN_BC_TO_ASSEMBLY", DataSetAsm,
++#if LLVM_VERSION_MAJOR == 17
+             "remark: <unknown>:0:0: 8 stack bytes in function "
++#else
++            "remark: <unknown>:0:0: 8 stack bytes in function 'f' "
++#endif
+             "[-Rpass-analysis=prologepilog]");
+ 
+   Status = amd_comgr_destroy_data_set(DataSetCl);
diff --git a/dev-libs/rocm-comgr/metadata.xml b/dev-libs/rocm-comgr/metadata.xml
index c0566e4b512e..0fea85b33c9c 100644
--- a/dev-libs/rocm-comgr/metadata.xml
+++ b/dev-libs/rocm-comgr/metadata.xml
@@ -9,7 +9,11 @@
         <email>xgreenlandforwyy@gmail.com</email>
         <name>Yiyang Wu</name>
     </maintainer>
+    <maintainer type="person">
+        <email>lockalsash@gmail.com</email>
+        <name>Sv. Lockal</name>
+    </maintainer>
     <upstream>
-        <remote-id type="github">RadeonOpenCompute/ROCm-CompilerSupport</remote-id>
+        <remote-id type="github">ROCm/ROCm-CompilerSupport</remote-id>
     </upstream>
 </pkgmetadata>
diff --git a/dev-libs/rocm-comgr/rocm-comgr-6.0.0.ebuild b/dev-libs/rocm-comgr/rocm-comgr-6.0.0.ebuild
deleted file mode 100644
index ff181f1b4615..000000000000
--- a/dev-libs/rocm-comgr/rocm-comgr-6.0.0.ebuild
+++ /dev/null
@@ -1,63 +0,0 @@
-# Copyright 1999-2023 Gentoo Authors
-# Distributed under the terms of the GNU General Public License v2
-
-EAPI=8
-
-inherit cmake llvm prefix
-
-LLVM_MAX_SLOT=17
-
-if [[ ${PV} == *9999 ]] ; then
-	EGIT_REPO_URI="https://github.com/RadeonOpenCompute/ROCm-CompilerSupport/"
-	inherit git-r3
-	S="${WORKDIR}/${P}/lib/comgr"
-else
-	SRC_URI="https://github.com/RadeonOpenCompute/ROCm-CompilerSupport/archive/rocm-${PV}.tar.gz -> ${P}.tar.gz"
-	S="${WORKDIR}/ROCm-CompilerSupport-rocm-${PV}/lib/comgr"
-	KEYWORDS="~amd64"
-fi
-
-IUSE="test"
-RESTRICT="!test? ( test )"
-
-PATCHES=(
-	"${FILESDIR}/${PN}-5.1.3-rocm-path.patch"
-	"${FILESDIR}/0001-Specify-clang-exe-path-in-Driver-Creation.patch"
-	"${FILESDIR}/0001-Find-CLANG_RESOURCE_DIR-using-clang-print-resource-d.patch"
-	"${FILESDIR}/${PN}-5.7.0-optional.patch"
-	"${FILESDIR}/${PN}-5.7.0-lld.patch"
-	"${FILESDIR}/${PN}-5.7.0-disassembly.patch"
-	"${FILESDIR}/${PN}-5.7.0-metadata.patch"
-	"${FILESDIR}/${PN}-5.7.0-symbolizer.patch"
-	"${FILESDIR}/${PN}-5.7.1-fix-tests.patch"
-	"${FILESDIR}/${PN}-5.7.1-correct-license-install-dir.patch"
-)
-
-DESCRIPTION="Radeon Open Compute Code Object Manager"
-HOMEPAGE="https://github.com/RadeonOpenCompute/ROCm-CompilerSupport"
-LICENSE="MIT"
-SLOT="0/$(ver_cut 1-2)"
-
-RDEPEND=">=dev-libs/rocm-device-libs-${PV}
-	sys-devel/clang:${LLVM_MAX_SLOT}=
-	sys-devel/clang-runtime:=
-	sys-devel/lld:${LLVM_MAX_SLOT}="
-DEPEND="${RDEPEND}"
-
-CMAKE_BUILD_TYPE=Release
-
-src_prepare() {
-	sed '/sys::path::append(HIPPath/s,"hip","",' -i src/comgr-env.cpp || die
-	sed "/return LLVMPath;/s,LLVMPath,llvm::SmallString<128>(\"$(get_llvm_prefix ${LLVM_MAX_SLOT})\")," -i src/comgr-env.cpp || die
-	eapply $(prefixify_ro "${FILESDIR}"/${PN}-5.0-rocm_path.patch)
-	cmake_src_prepare
-}
-
-src_configure() {
-	local mycmakeargs=(
-		-DLLVM_DIR="$(get_llvm_prefix ${LLVM_MAX_SLOT})"
-		-DCMAKE_STRIP=""  # disable stripping defined at lib/comgr/CMakeLists.txt:58
-		-DBUILD_TESTING=$(usex test ON OFF)
-	)
-	cmake_src_configure
-}
diff --git a/dev-libs/rocm-comgr/rocm-comgr-6.1.1.ebuild b/dev-libs/rocm-comgr/rocm-comgr-6.1.1.ebuild
new file mode 100644
index 000000000000..a2492992ceed
--- /dev/null
+++ b/dev-libs/rocm-comgr/rocm-comgr-6.1.1.ebuild
@@ -0,0 +1,88 @@
+# Copyright 1999-2024 Gentoo Authors
+# Distributed under the terms of the GNU General Public License v2
+
+EAPI=8
+
+LLVM_COMPAT=( 18 )
+
+inherit cmake llvm-r1 prefix
+
+MY_P=llvm-project-rocm-${PV}
+components=( "amd/comgr" )
+
+DESCRIPTION="Radeon Open Compute Code Object Manager"
+HOMEPAGE="https://github.com/ROCm/ROCm-CompilerSupport"
+SRC_URI="https://github.com/ROCm/llvm-project/archive/rocm-${PV}.tar.gz -> ${MY_P}.tar.gz"
+S="${WORKDIR}/${MY_P}/${components[0]}"
+
+LICENSE="MIT"
+SLOT="0/$(ver_cut 1-2)"
+KEYWORDS="~amd64"
+
+IUSE="test"
+RESTRICT="!test? ( test )"
+
+PATCHES=(
+	"${FILESDIR}/${PN}-5.1.3-rocm-path.patch"
+	"${FILESDIR}/0001-Find-CLANG_RESOURCE_DIR-using-clang-print-resource-d.patch"
+	"${FILESDIR}/${PN}-5.7.1-correct-license-install-dir.patch"
+	"${FILESDIR}/${PN}-6.0.0-extend-isa-compatibility-check.patch"
+	"${FILESDIR}/${PN}-6.1.0-llvm-18-compat.patch"
+	"${FILESDIR}/${PN}-6.1.0-enforce-oop-compiler.patch"
+	"${FILESDIR}/${PN}-6.1.0-fix-comgr-default-flags.patch"
+	"${FILESDIR}/${PN}-6.1.0-dont-add-nogpulib.patch"
+)
+
+RDEPEND=">=dev-libs/rocm-device-libs-${PV}
+	sys-devel/clang-runtime:=
+	$(llvm_gen_dep '
+		sys-devel/clang:${LLVM_SLOT}=
+		sys-devel/lld:${LLVM_SLOT}=
+	')
+	dev-util/hipcc:${SLOT}
+"
+DEPEND="${RDEPEND}"
+
+CMAKE_BUILD_TYPE=Release
+
+src_unpack() {
+	if [[ ${PV} == *9999 ]] ; then
+		git-r3_fetch
+		git-r3_checkout '' . '' "${components[@]}"
+	else
+		archive="${MY_P}.tar.gz"
+		ebegin "Unpacking from ${archive}"
+		tar -x -z -o \
+			-f "${DISTDIR}/${archive}" \
+			"${components[@]/#/${MY_P}/}" || die
+		eend ${?}
+	fi
+}
+
+src_prepare() {
+	sed '/sys::path::append(HIPPath/s,"hip","",' -i src/comgr-env.cpp || die
+	sed "/return LLVMPath;/s,LLVMPath,llvm::SmallString<128>(\"$(get_llvm_prefix)\")," -i src/comgr-env.cpp || die
+	eapply $(prefixify_ro "${FILESDIR}"/${PN}-5.0-rocm_path.patch)
+
+	cmake_src_prepare
+
+	# Replace @CLANG_RESOURCE_DIR@ in patches
+	local CLANG_RESOURCE_DIR="$("$(get_llvm_prefix)"/bin/clang -print-resource-dir)"
+	sed "s,@CLANG_RESOURCE_DIR@,\"${CLANG_RESOURCE_DIR}\"," -i src/comgr-compiler.cpp || die
+}
+
+src_configure() {
+	local mycmakeargs=(
+		-DLLVM_DIR="$(get_llvm_prefix)"
+		-DCMAKE_STRIP=""  # disable stripping defined at lib/comgr/CMakeLists.txt:58
+		-DBUILD_TESTING=$(usex test ON OFF)
+	)
+	cmake_src_configure
+}
+
+src_test() {
+	local CMAKE_SKIP_TESTS=(
+		comgr_nested_kernel_test # See https://github.com/ROCm/llvm-project/issues/35
+	)
+	cmake_src_test
+}