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authorV3n3RiX <venerix@koprulu.sector>2022-06-29 12:04:12 +0100
committerV3n3RiX <venerix@koprulu.sector>2022-06-29 12:04:12 +0100
commit0f558761aa2dee1017b4751e4017205e015a9560 (patch)
tree037df795519468a25d9362b4e95cdaeb84eb1cf9 /sci-libs/rocSPARSE/files
parent752d6256e5204b958b0ef7905675a940b5e9172f (diff)
gentoo resync : 29.12.2022
Diffstat (limited to 'sci-libs/rocSPARSE/files')
-rw-r--r--sci-libs/rocSPARSE/files/rocSPARSE-5.0.2-remove-incorrect-assert.patch34
1 files changed, 34 insertions, 0 deletions
diff --git a/sci-libs/rocSPARSE/files/rocSPARSE-5.0.2-remove-incorrect-assert.patch b/sci-libs/rocSPARSE/files/rocSPARSE-5.0.2-remove-incorrect-assert.patch
new file mode 100644
index 000000000000..9baa962c05f5
--- /dev/null
+++ b/sci-libs/rocSPARSE/files/rocSPARSE-5.0.2-remove-incorrect-assert.patch
@@ -0,0 +1,34 @@
+From 48b763f01b658dece7f71784fe4362e56167db2f Mon Sep 17 00:00:00 2001
+From: James Sandham <33790278+jsandham@users.noreply.github.com>
+Date: Fri, 28 Jan 2022 10:24:08 -0800
+Subject: [PATCH] remove incorrect assert from spmm_bell (#302)
+
+Co-authored-by: jsandham <james.sandham@amd.com>
+---
+ library/src/level3/rocsparse_bellmm_template_general.cpp | 7 +++----
+ 1 file changed, 3 insertions(+), 4 deletions(-)
+
+diff --git a/library/src/level3/rocsparse_bellmm_template_general.cpp b/library/src/level3/rocsparse_bellmm_template_general.cpp
+index 81f36a32..bbce9a17 100644
+--- a/library/src/level3/rocsparse_bellmm_template_general.cpp
++++ b/library/src/level3/rocsparse_bellmm_template_general.cpp
+@@ -1,6 +1,6 @@
+ /*! \file */
+ /* ************************************************************************
+- * Copyright (c) 2021 Advanced Micro Devices, Inc.
++ * Copyright (c) 2021-2022 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+@@ -101,9 +101,8 @@ rocsparse_status rocsparse_bellmm_template_general(rocsparse_handle han
+ I ldc)
+ {
+ hipStream_t stream = handle->stream;
+- assert(block_dim > 32);
+- dim3 bellmm_blocks((mb - 1) / 1 + 1, (n - 1) / 32 + 1);
+- dim3 bellmm_threads(32, 32, 1);
++ dim3 bellmm_blocks((mb - 1) / 1 + 1, (n - 1) / 32 + 1);
++ dim3 bellmm_threads(32, 32, 1);
+ assert(trans_A == rocsparse_operation_none);
+ //
+ // What happends if A needs to be transposed?