diff options
author | V3n3RiX <venerix@koprulu.sector> | 2024-12-24 06:30:58 +0000 |
---|---|---|
committer | V3n3RiX <venerix@koprulu.sector> | 2024-12-24 06:30:58 +0000 |
commit | 17e417b73cb3e25edbc6541bd107bc9c593d66bd (patch) | |
tree | 866f98b73f846149d0c9e7e5a1cf0527b7c54e08 /sys-devel | |
parent | 338095605b6c9c82690f77f27a32490c9a57bdcb (diff) |
gentoo auto-resync : 24:12:2024 - 06:30:57
Diffstat (limited to 'sys-devel')
-rw-r--r-- | sys-devel/Manifest.gz | bin | 6214 -> 6218 bytes | |||
-rw-r--r-- | sys-devel/gcc/Manifest | 3 | ||||
-rw-r--r-- | sys-devel/gcc/files/gcc-14.2.1_p20241221-arm-Revert-arm-MVE-intrinsics-Fix-support-for-predicate-.patch | 144 | ||||
-rw-r--r-- | sys-devel/gcc/gcc-14.2.1_p20241221.ebuild | 1 |
4 files changed, 147 insertions, 1 deletions
diff --git a/sys-devel/Manifest.gz b/sys-devel/Manifest.gz Binary files differindex 8df576922811..698ed222c836 100644 --- a/sys-devel/Manifest.gz +++ b/sys-devel/Manifest.gz diff --git a/sys-devel/gcc/Manifest b/sys-devel/gcc/Manifest index 1a213dd830b2..84e27fcd00f8 100644 --- a/sys-devel/gcc/Manifest +++ b/sys-devel/gcc/Manifest @@ -1,4 +1,5 @@ AUX gcc-13-fix-cross-fixincludes.patch 883 BLAKE2B 1ae33195320754c55f42e1206bcfdf98914af5190df5939a4c7b072a2bc25216c354ea5d76f5171e1b8a150ca7764bdf57cea1bc137c237a5e8bb44713885f1b SHA512 ca9625001f0a10826d75691fdba35ca5783ed2f80e605b935785f8dc7591b0e650dca28bf1fc7e688e27547dddc7ab38232459b4f1865ed10a148978d0e09703 +AUX gcc-14.2.1_p20241221-arm-Revert-arm-MVE-intrinsics-Fix-support-for-predicate-.patch 5160 BLAKE2B f229bc58851d348a67d636d65878166479f2eb735dddc6368e21c2cc5b1c2b8660b1c87024c1637a25a9acf609662823337307f21fe9a51fe9cbfc6fdcbb0a16 SHA512 c62e991b826cee7258abfa3f1305fc33b8b0e0dce2aaa1ae5a753b547126d9dde6632894eb72e46c6c78c9777029a7593a4f9afbb6a3ac6d831c63ea0c19decd AUX gcc-15.0.0_pre20241117-PR112556-c-Allow-bool-and-enum-null-pointer-constants.patch 6096 BLAKE2B bb5174aef160cc53f88471ada00f910295056c87c788872b434480a1fdcb6b54f2390367f301018c652838f4ef4af29af17370ae4fde8e4f01679afd7aaf2585 SHA512 b8c45d624a52c0525b62b2e9ee6b06bc6bd2ee5147ca35df5e243dc0794c59e1f6bd3020ea108078f9e8f9308d24a1af3ccf4b6cce5cbeb7561c6d00d707b5c7 AUX gcc-configure-texinfo.patch 341 BLAKE2B d2ea3b2ea08f5d3a498ba27d0fb95e325097e2104e55caa28b66515cb48662649140d90b639369aedc54b2b1178fa4b49cda442f5f504e09d88a2efa45a5057c SHA512 e8d34c5077409df5495cf0c5fbf5e77f841c5698108fa6a5fde33eb28202c685603bdefd8368918e55f30c4b995e895d71d64c715c1ec2b017e09eb2c54c09ff DIST gcc-10.5.0-musl-patches-2.tar.xz 3452 BLAKE2B 5387e516d07d81477b3f39b8b3bd986bf861d32cd25dc5481c97bd3620d00c918c5661e86857f66dbf28a655401a53e43417f638c443e44cbfdbf5e950caac4d SHA512 86f2ce31cc4fc4fb5a6043fb527bf822d895e1a6220652024f78a1cbd5a962edb6be8dc5f43c32053e075f39bb2350ea8f14e7d57e0473dd2933a7b44676bde5 @@ -86,7 +87,7 @@ EBUILD gcc-14.2.1_p20241123.ebuild 1471 BLAKE2B 604432346e6d948408a19aca8b34f5db EBUILD gcc-14.2.1_p20241130.ebuild 1440 BLAKE2B 549acf35ea02eb6fd9564c47e05fb0f80d098a8f4dbbbb84bbda416d9b37c3800ce542d3dc41f0ee32e5f9e1dc620f3bab94261a77f03e4019a362c060d04bc7 SHA512 a7c078eace78b51148060ebc4e314f64f2152b4339b38983d46bc1853cc02bc45dea1556b6f4cf5db47129a620362341a8a19e76366035bdf916f5d55c527a15 EBUILD gcc-14.2.1_p20241207.ebuild 1440 BLAKE2B 40a02c1bbd853899c10c3d291e00a045b68d792c73cc25b2c933ecd4275f58819029b6db7ee0354eb8e1d83525d6f4ee52988bac9821dc2c94f5d207a2f2a293 SHA512 f342310f0709440bf7088aba6add24dd9d8b01511ba1025e25edd49824b245fc21151e4512fe9ec00a0066545cef9f2ac2ee299669c56ee7035031ae9cf1dcae EBUILD gcc-14.2.1_p20241214.ebuild 1440 BLAKE2B 40a02c1bbd853899c10c3d291e00a045b68d792c73cc25b2c933ecd4275f58819029b6db7ee0354eb8e1d83525d6f4ee52988bac9821dc2c94f5d207a2f2a293 SHA512 f342310f0709440bf7088aba6add24dd9d8b01511ba1025e25edd49824b245fc21151e4512fe9ec00a0066545cef9f2ac2ee299669c56ee7035031ae9cf1dcae -EBUILD gcc-14.2.1_p20241221.ebuild 1439 BLAKE2B 02b80e10d6c48e85d320714bf8c84323005f48c9441f46fd9f3dbeab6d4670f2ea67d1f37ecfcb6dfa309879ce69a16bd892e01eab14ef70e2f319a45e4282c0 SHA512 ffb2601935b1b74940d637176e40b6b3736ec5d68638e65e17c3d7c08a3b13d8c6ae0a56a39f35039e8fee61d37de26b38cb9b7248a09ce9d7e65034d35530ae +EBUILD gcc-14.2.1_p20241221.ebuild 1545 BLAKE2B e755f8a44d5fb123399c96d84050c8f5496a2d8231e5b4f06e59b2a66de020108d452e556a6a7609653736ceab01cbbcbef7f6caafa2ed01eeadebc190876502 SHA512 4689dbe5539f4f2111e858735705a42b1be62f0fc0fa32ef94ae3d8d0cc5120ca6cb8a838910642e5b31232eef293ee32158e93b5afe966aca0b9431ca2d3c36 EBUILD gcc-14.3.9999.ebuild 1410 BLAKE2B 0f77f0e17b7bf3d617ed4feec61406108d92e9ac8bd3597651b7f6814c45ddf56393228cda23fccf189e3fa106b9d389196da4f565283a10923bfe29a06fbfe2 SHA512 802582faf27fe46fcd75b8b917aa155739e4e0f70d010f14bf42cea3007da124a53fe1ee903e6004d4d8277350ac88d7ade78f79ce8a036b29e14dec45ba2d15 EBUILD gcc-15.0.0_pre20241117-r2.ebuild 1447 BLAKE2B 6a12ceb7b56aae61eea49ffe398edbf73768d78c50e3cce19b26adf52b04a114f62d1ffc1bd96a30b0ab12f1ff89d9820eb2b3a1c2959c56fcab9012f23d58c1 SHA512 8187e8a6fcb7fbcf20898e55efb6302331640cb874be44d699679c287575ef2e1ec7f49ed8db61d5f0d2bfcf90b6bd35ce9318841655bffff99518d8bdcdb470 EBUILD gcc-15.0.0_pre20241124.ebuild 1360 BLAKE2B 39e50bebad9adbae4866c7a6be7cc79ebdadea6c117519b9360c3cac494d04c87877e258ff180b9592e26fb1deffda73f519ae625e5f6388d7da6ec280455749 SHA512 1773a80bf4f0068130901d8287e25f9a19829f1b510fa6ac00cf430cb8fe33fb574a67bf9ddaa5a6321b445663c4ca16af5c95815c57eeca7a589684ae38e84d diff --git a/sys-devel/gcc/files/gcc-14.2.1_p20241221-arm-Revert-arm-MVE-intrinsics-Fix-support-for-predicate-.patch b/sys-devel/gcc/files/gcc-14.2.1_p20241221-arm-Revert-arm-MVE-intrinsics-Fix-support-for-predicate-.patch new file mode 100644 index 000000000000..026cf14cb840 --- /dev/null +++ b/sys-devel/gcc/files/gcc-14.2.1_p20241221-arm-Revert-arm-MVE-intrinsics-Fix-support-for-predicate-.patch @@ -0,0 +1,144 @@ +https://gcc.gnu.org/PR118176 + +From ecd031a9470257324484c66b51c6baff943e01ab Mon Sep 17 00:00:00 2001 +Message-ID: <ecd031a9470257324484c66b51c6baff943e01ab.1734954594.git.sam@gentoo.org> +From: Christophe Lyon <christophe.lyon@linaro.org> +Date: Mon, 23 Dec 2024 08:11:34 +0000 +Subject: [PATCH] Revert "arm: [MVE intrinsics] Fix support for predicate + constants [PR target/114801]" + +This reverts commit 0631c5770e8162dbe67c73dee0327313c19822c2. +--- + gcc/config/arm/arm-mve-builtins.cc | 32 +-------------- + .../gcc.target/arm/mve/pr108443-run.c | 2 +- + gcc/testsuite/gcc.target/arm/mve/pr108443.c | 4 +- + gcc/testsuite/gcc.target/arm/mve/pr114801.c | 39 ------------------- + 4 files changed, 4 insertions(+), 73 deletions(-) + delete mode 100644 gcc/testsuite/gcc.target/arm/mve/pr114801.c + +diff --git a/gcc/config/arm/arm-mve-builtins.cc b/gcc/config/arm/arm-mve-builtins.cc +index ec856f7d6168..e1826ae40527 100644 +--- a/gcc/config/arm/arm-mve-builtins.cc ++++ b/gcc/config/arm/arm-mve-builtins.cc +@@ -2107,37 +2107,7 @@ function_expander::add_input_operand (insn_code icode, rtx x) + mode = GET_MODE (x); + } + else if (VALID_MVE_PRED_MODE (mode)) +- { +- if (CONST_INT_P (x)) +- { +- if (mode == V8BImode || mode == V4BImode) +- { +- /* In V8BI or V4BI each element has 2 or 4 bits, if those bits +- aren't all the same, gen_lowpart might ICE. Canonicalize all +- the 2 or 4 bits to all ones if any of them is non-zero. V8BI +- and V4BI multi-bit masks are interpreted byte-by-byte at +- instruction level, but such constants should describe lanes, +- rather than bytes. See the section on MVE intrinsics in the +- Arm ACLE specification. */ +- unsigned HOST_WIDE_INT xi = UINTVAL (x); +- xi |= ((xi & 0x5555) << 1) | ((xi & 0xaaaa) >> 1); +- if (mode == V4BImode) +- xi |= ((xi & 0x3333) << 2) | ((xi & 0xcccc) >> 2); +- if (xi != UINTVAL (x)) +- warning_at (location, 0, "constant predicate argument %d" +- " (%wx) does not map to %d lane numbers," +- " converted to %wx", +- opno, UINTVAL (x) & 0xffff, +- mode == V8BImode ? 8 : 4, +- xi & 0xffff); +- +- x = gen_int_mode (xi, HImode); +- } +- x = gen_lowpart (mode, x); +- } +- else +- x = force_lowpart_subreg (mode, x, GET_MODE (x)); +- } ++ x = gen_lowpart (mode, x); + + m_ops.safe_grow (m_ops.length () + 1, true); + create_input_operand (&m_ops.last (), x, mode); +diff --git a/gcc/testsuite/gcc.target/arm/mve/pr108443-run.c b/gcc/testsuite/gcc.target/arm/mve/pr108443-run.c +index b894f019b8bb..cb4b45bd3056 100644 +--- a/gcc/testsuite/gcc.target/arm/mve/pr108443-run.c ++++ b/gcc/testsuite/gcc.target/arm/mve/pr108443-run.c +@@ -16,7 +16,7 @@ __attribute__ ((noipa)) partial_write (uint32_t *a, uint32x4_t v, unsigned short + + int main (void) + { +- unsigned short p = 0x00FF; ++ unsigned short p = 0x00CC; + uint32_t a[] = {0, 0, 0, 0}; + uint32_t b[] = {0, 0, 0, 0}; + uint32x4_t v = vdupq_n_u32 (0xFFFFFFFFU); +diff --git a/gcc/testsuite/gcc.target/arm/mve/pr108443.c b/gcc/testsuite/gcc.target/arm/mve/pr108443.c +index 0c0e2dd6eb8f..c5fbfa4a1bb7 100644 +--- a/gcc/testsuite/gcc.target/arm/mve/pr108443.c ++++ b/gcc/testsuite/gcc.target/arm/mve/pr108443.c +@@ -7,8 +7,8 @@ + void + __attribute__ ((noipa)) partial_write_cst (uint32_t *a, uint32x4_t v) + { +- vstrwq_p_u32 (a, v, 0x00FF); ++ vstrwq_p_u32 (a, v, 0x00CC); + } + +-/* { dg-final { scan-assembler {mov\tr[0-9]+, #255} } } */ ++/* { dg-final { scan-assembler {mov\tr[0-9]+, #204} } } */ + +diff --git a/gcc/testsuite/gcc.target/arm/mve/pr114801.c b/gcc/testsuite/gcc.target/arm/mve/pr114801.c +deleted file mode 100644 +index ab3130fd4ce8..000000000000 +--- a/gcc/testsuite/gcc.target/arm/mve/pr114801.c ++++ /dev/null +@@ -1,39 +0,0 @@ +-/* { dg-do compile } */ +-/* { dg-require-effective-target arm_v8_1m_mve_ok } */ +-/* { dg-options "-O2" } */ +-/* { dg-add-options arm_v8_1m_mve } */ +-/* { dg-final { check-function-bodies "**" "" "" } } */ +- +-#include <arm_mve.h> +- +-/* +-** test_32: +-**... +-** mov r[0-9]+, #65295 @ movhi +-**... +-*/ +-uint32x4_t test_32() { +- /* V4BI predicate converted to 0xff0f. */ +- return vdupq_m_n_u32(vdupq_n_u32(0xffffffff), 0, 0x4f02); /* { dg-warning {constant predicate argument 3 \(0x4f02\) does not map to 4 lane numbers, converted to 0xff0f} } */ +-} +- +-/* +-** test_16: +-**... +-** mov r[0-9]+, #12339 @ movhi +-**... +-*/ +-uint16x8_t test_16() { +- /* V8BI predicate converted to 0x3033. */ +- return vdupq_m_n_u16(vdupq_n_u16(0xffff), 0, 0x3021); /* { dg-warning {constant predicate argument 3 \(0x3021\) does not map to 8 lane numbers, converted to 0x3033} } */ +-} +- +-/* +-** test_8: +-**... +-** mov r[0-9]+, #23055 @ movhi +-**... +-*/ +-uint8x16_t test_8() { +- return vdupq_m_n_u8(vdupq_n_u8(0xff), 0, 0x5a0f); +-} + +base-commit: e883a7082fecfd85694b275bec4a2e428ac9a081 +prerequisite-patch-id: 4000f228fd3953eb9877fab7b9493cd86f6bc771 +prerequisite-patch-id: d61e09af01bb7358c1df6abf5d2c4b7849ab4676 +prerequisite-patch-id: 54a4cfb376547141937d7e321d7b4554c1e3afe7 +prerequisite-patch-id: 3117f4e58bd5c0a1aca48af82106bb7f779842fa +prerequisite-patch-id: a470cf090a6867789c0722d012786c6066d3e706 +-- +2.47.1 + diff --git a/sys-devel/gcc/gcc-14.2.1_p20241221.ebuild b/sys-devel/gcc/gcc-14.2.1_p20241221.ebuild index af132c7fd593..85d1df0458b1 100644 --- a/sys-devel/gcc/gcc-14.2.1_p20241221.ebuild +++ b/sys-devel/gcc/gcc-14.2.1_p20241221.ebuild @@ -50,5 +50,6 @@ src_prepare() { toolchain_src_prepare eapply "${FILESDIR}"/${PN}-13-fix-cross-fixincludes.patch + eapply "${FILESDIR}"/gcc-14.2.1_p20241221-arm-Revert-arm-MVE-intrinsics-Fix-support-for-predicate-.patch eapply_user } |