diff options
Diffstat (limited to 'dev-libs/rocm-comgr')
-rw-r--r-- | dev-libs/rocm-comgr/Manifest | 7 | ||||
-rw-r--r-- | dev-libs/rocm-comgr/files/rocm-comgr-5.7.0-disassembly.patch | 20 | ||||
-rw-r--r-- | dev-libs/rocm-comgr/files/rocm-comgr-5.7.0-lld.patch | 39 | ||||
-rw-r--r-- | dev-libs/rocm-comgr/files/rocm-comgr-5.7.0-metadata.patch | 73 | ||||
-rw-r--r-- | dev-libs/rocm-comgr/files/rocm-comgr-5.7.0-optional.patch | 113 | ||||
-rw-r--r-- | dev-libs/rocm-comgr/files/rocm-comgr-5.7.0-symbolizer.patch | 39 | ||||
-rw-r--r-- | dev-libs/rocm-comgr/rocm-comgr-5.7.0.ebuild | 61 |
7 files changed, 352 insertions, 0 deletions
diff --git a/dev-libs/rocm-comgr/Manifest b/dev-libs/rocm-comgr/Manifest index 88e0a3f66fe4..29e64fbf173d 100644 --- a/dev-libs/rocm-comgr/Manifest +++ b/dev-libs/rocm-comgr/Manifest @@ -18,12 +18,19 @@ AUX rocm-comgr-5.5.1-lld-include.patch 795 BLAKE2B c2e58f098f751c015154c8b9c775a AUX rocm-comgr-5.5.1-nullopt.patch 785 BLAKE2B 329f60db229bd8f75821c213b108c2342fc1083e9f82f516c40e96318c36a69de1be9865bf4ef5dc03864fd2646018f2150a04547e4ac60283042f2a3db6ced3 SHA512 f3f08decdca3b8619e724d79e826744c8da19d748b49701a6a221b2762c9a7b5bd882530e1c80ffd19e20a1794d86f9c557ede9a9ce703ca21a2d1739da45b69 AUX rocm-comgr-5.5.1-opt_mrelax.patch 955 BLAKE2B b68c0681defcc63a09b425af49ceb2bd0ebd70f784014bd9121fea7b00ee090d855c544cee4312cfcbbf86b8205d25d36ac623c741d6dccb537aa27ddb9e584f SHA512 e26d8befea08034a2bfbb4cd13ffd418b95d842b8915ffb6129395ec4ab334917ee5a368e85a09f1bfc2b8021dc293327b2b3f56462267aa5e964e6500348cee AUX rocm-comgr-5.5.1-subtargetfeatures.patch 1133 BLAKE2B 6a138bd5abee576c78e005745bb66c2beecb35737c02850f74f7877a9b204c0789d3fbbfd0815502b86602125f32b1b27cf131ffd216ec6a3e064606f8ec1b50 SHA512 0ca10166aa1c13f74a48468547d841fd173319fcaccacba00c7f70f61383095515a57eb5b97707f01d9859667ed2479da8d6f30253c39a8777c76bc1974c77a1 +AUX rocm-comgr-5.7.0-disassembly.patch 656 BLAKE2B b1ac5227b7b4d7a25cc5674ca185075e22dc91eb2e64ea1598fae03915a22153cfdafee4c34afc34e7490515bbdb09d49ba290d4544c617f23427d04296181ac SHA512 647a0a613786df7907616af43397ba9b16a80a7f6e7420ac41be7cc424a94df7f3248875bcb336e13de0f2ae13832362c6cbc42356703b655efc58cc4d6e4b6d +AUX rocm-comgr-5.7.0-lld.patch 1355 BLAKE2B 565e3052974b99ee5050fc1b64d5f3b337866cf21a5d37fa37888e6257cf00b1718a0d3933b3f0e4e27caca4537652824c1ce01a8600852da503eead94a12d8f SHA512 35e6b2c8ad97d3dd5a870ed5c547c3727cd384c773371fa9608e29f7d525252f34fb784798c82c2071098667fd69ca4b89dfee20a8bf28b73b14bd13b4b00a50 +AUX rocm-comgr-5.7.0-metadata.patch 2738 BLAKE2B de124cc61ad4e59ca182a8868bdff0c2fa44ec8a474f4c2d31aae8b90aabee6b32394959dd3589cf4756d09cb26dc1691df386f0b6687bb365dfabe6b76f2622 SHA512 440a6cc6fed0c4091effc39ffab5b4f59c0d503db7ea6bd8eae681422b4b385f3f8176722f7a2b396cced8229a9c3904ac795c62949bc805284e6a0203ab9bba +AUX rocm-comgr-5.7.0-optional.patch 3965 BLAKE2B 78b837f4f2797274fe38cc1ceb1d1e7a4b40936199acc3a97150f9ac637dfd5b1e6f9bf6b285ede5ec10010ec90a9379ce31248049becfedeb9c0d8d20b4f0f7 SHA512 6a0f9c5bcaed29d792d41180b261ba3cb9384b2a726cef304664438abb47ac9b084c2c230ccd66ba5257ac39f0690bfab9b90840b4a9a23a020adbcb804a0d7c +AUX rocm-comgr-5.7.0-symbolizer.patch 1503 BLAKE2B fa8071ad2bbcd0ab4e6f05260617cfa693be6b9000ba240c7faa8e5e4a22e66f5e52b584d7673d8a55881677f864c5cadff7a488feb3cd4ff1194a60b63d68d5 SHA512 624ed4647c8b8bb9d8945acdd3166a78d6333a34397e4980c4ce29a8389768cd286eeeca7ee92aa8969c607081afce4acfe4548074b16034ad59108d84fbb0fc DIST rocm-comgr-5.1.3.tar.gz 117155 BLAKE2B 40e415c4c7ae3e709dd50981299291f0fc1133f35310b4c86a86847d3bce5fd7685a3f4480f8f156873ca922921c1d4e1cb620fd33bd5cdc87f155af839f2bbe SHA512 5927250f5e03c32b7f270a1dbfe5221d349dfe32aba34143040da53d4e7eb83faa3073a43edabcff13e1fc977bc17088404523f2ab2ea95e207d2c00beb4249b DIST rocm-comgr-5.3.3.tar.gz 120414 BLAKE2B 29b9d466d74ef94165a2b9bea35eac4616f6b2fc529cdac3c830ee7dc08f219cb9e5d4f081658881c76633f12eaebb74d1a2ea30a76652231b8ee516f9988db1 SHA512 ba7b1ef214e3624168e438ed7fd94291a07508fe89d178c0b158bf22e0998d5a8e4d8f0a7f08f05ac108ef65f725db5764fd66353a85bc25000e572a4fdcb61f DIST rocm-comgr-5.4.3.tar.gz 120461 BLAKE2B c4eb79dd5a72a2b18e16841fc8cb9a3a33efb0c7b04a7585df9672d682bba6fa826ab8b37dba5febca3b8c5ee5aca30d8546e1fa69e77671e5c750e2a8c1f12f SHA512 1a25af99a0166d70ca6dc5df5a667068eaf583dccd74bbb18a2a5de3c1b769e0c1eb9a0c539e0cd88bc50bbbe53214a1d1b23fbdfd6fc5b6507c44da259815c4 DIST rocm-comgr-5.5.1.tar.gz 127475 BLAKE2B dbcb6729b27c0b4a4be37f5e462d96b10c15a6a3b540a81a74a648fc45dc727ea5706db1a0f4583a31ac4cb5c9f0d9f4e258fa5ac792b327f4cb1dfe6d585937 SHA512 09174ef2ad21f62b197e439bb5b04a365233c360c57cc2ccf0ea3d53edfa8880dff4f127c6d6c1d430b63b6f7ea666705b14cadc2bccb89c0fefed943b0cf1c7 +DIST rocm-comgr-5.7.0.tar.gz 137929 BLAKE2B 955253295311764406fc37505ce417aef9efdc35d705109d890a85202e546581de74803f446221636a192bbaf0bec9f8dc31067e7d1d332113e1b1d43468c269 SHA512 e73eeb11bdf81408693263dd4f6d751f4804358d8fabda06e70e3a3b66f14525a408db1f281a04d539cb37b95bede26df15a1473c1719bd7805d774399d104ab EBUILD rocm-comgr-5.1.3-r3.ebuild 2051 BLAKE2B 98d8ad8164c8a401961a9abb1a973e1123a049c4a3949114f3493d36f02cd5f2048554828cf5838c00c47a128e21420ba7cf6c3de29086b918e56c5fe79410f7 SHA512 8341569140712543b778a771a381933a9cd14c0a5dcf3393e196d0121eb14a01614bf2080df2cd1f5a51b5bb3f5fb55dae9b7bddc4954900a64d5af0443e3a0f EBUILD rocm-comgr-5.3.3-r2.ebuild 1943 BLAKE2B e286731895a9cb985eef52ab23fea988d11fc4294fc65c91b9dc81ec5af8c5a747ae699a6af878436e8260c77e94402593fccae9dd8fdd65f05c3da27087b82f SHA512 fd5a47cb1eb354078c9aa4f5fc27d05629a7f40984e9f166a36a5d47faf8ccf3321d8a326145e192c25cc685ed041e9c756b7e57598902acc07c743ea0c7cc3c EBUILD rocm-comgr-5.4.3-r1.ebuild 1892 BLAKE2B 3225c9fc2eb31f8810e1072ccf20681987ed6d8072f7bb0a1d661ab2eb327ad30afa0a6fd8f8299bd626f34cffd25e9f15d42a5e7fb6ac62f314755ce1ca3116 SHA512 265cd1523b8dc85a875a008cb8a2b6b3098cc07277199c3cccb749f4a30d22d8e71eefba1474aad18034b13002d734b46cec614f1fe56e67c4482dbeb8bc0079 EBUILD rocm-comgr-5.5.1.ebuild 2022 BLAKE2B 7bc047bb17510907af10ce3763ccc6bd52d1bccb4264bd920936dd76d9e7040565b041ed4f6422ca858a40f8c1f073a8bcec5d9b93bea947e72aa48091cf3f6a SHA512 31024125b88958a422fec60cb35eb2aa7f3c9ec0862c2f218f8b6c7ce1ccc3515f3976de53d79715c6e3bcbb3fccc6ee4347013e711379702c88b1ebdee894bf +EBUILD rocm-comgr-5.7.0.ebuild 1847 BLAKE2B bb5b2b2cfc5b5388c2ba27d4085167f637f831dd802bcbe9213e98a7ce1f6d58a5370a33368e82c4347c455a78ff9d43cdead944cbeac67ede65561607b04e6c SHA512 fd82efa78417e94337c20af1a5021c70ebda8525014a87061d96ca5d6b4fbbae97cc0bfc99adacf706a5fa34e080e4aa3cce88796023805cfc2d5a22e53c2fa3 MISC metadata.xml 526 BLAKE2B d2c4b5c4210cd4ae436bc205ec6c6d0e2690edc99250e508b64f3abbf0f7b4a61b27cb627d9453ff6432cd683fb7f51460b4e821ce7614880e68854121297db5 SHA512 5cf80a58a6791b404d33577fa1cd199791ad4348d0e18d2ba9d8e1665cfc5a19c7d37cfe265c77c060bc886f24ce28b592c6b7d541531faaf62e5440b732d2e7 diff --git a/dev-libs/rocm-comgr/files/rocm-comgr-5.7.0-disassembly.patch b/dev-libs/rocm-comgr/files/rocm-comgr-5.7.0-disassembly.patch new file mode 100644 index 000000000000..6c1052b0b968 --- /dev/null +++ b/dev-libs/rocm-comgr/files/rocm-comgr-5.7.0-disassembly.patch @@ -0,0 +1,20 @@ +commit 446d142de276a8ca1039798726a2b81937ece952 +Author: Ron Lieberman <ron.lieberman@amd.com> +Date: Thu Jul 13 19:42:47 2023 -0500 + + add #include llvm/ADT/StringExtras.h to comgr-disassembly.cpp + + Change-Id: Id0086adec6e33db55769a12f6a886202c8afd9e0 + +diff --git a/src/comgr-disassembly.cpp b/src/comgr-disassembly.cpp +index 8703c0d..31e9634 100644 +--- a/src/comgr-disassembly.cpp ++++ b/src/comgr-disassembly.cpp +@@ -34,6 +34,7 @@ + ******************************************************************************/ + + #include "comgr-disassembly.h" ++#include "llvm/ADT/StringExtras.h" + #include "llvm/MC/TargetRegistry.h" + + using namespace llvm; diff --git a/dev-libs/rocm-comgr/files/rocm-comgr-5.7.0-lld.patch b/dev-libs/rocm-comgr/files/rocm-comgr-5.7.0-lld.patch new file mode 100644 index 000000000000..ee21b87fb782 --- /dev/null +++ b/dev-libs/rocm-comgr/files/rocm-comgr-5.7.0-lld.patch @@ -0,0 +1,39 @@ +commit 3f4486f33bdeff6d705431b7a3b6cb5d064cc2b2 +Author: Scott Linder <Scott.Linder@amd.com> +Date: Mon Jun 19 19:24:26 2023 +0000 + + Update to use lld::lldMain introduced in D119049 + + Change-Id: I9dd8de3f599fab14b62f482352ae43874ff87373 + +diff --git a/src/comgr-compiler.cpp b/src/comgr-compiler.cpp +index 30e838c..7b51d3f 100644 +--- a/src/comgr-compiler.cpp ++++ b/src/comgr-compiler.cpp +@@ -85,6 +85,8 @@ + + #include <csignal> + ++LLD_HAS_DRIVER(elf) ++ + using namespace llvm; + using namespace llvm::opt; + using namespace llvm::sys; +@@ -614,13 +616,14 @@ static amd_comgr_status_t linkWithLLD(llvm::ArrayRef<const char *> Args, + llvm::raw_ostream &LogE) { + ArgStringList LLDArgs(llvm::iterator_range<ArrayRef<const char *>::iterator>( + Args.begin(), Args.end())); +- LLDArgs.insert(LLDArgs.begin(), "lld"); ++ LLDArgs.insert(LLDArgs.begin(), "ld.lld"); + LLDArgs.push_back("--threads=1"); + + ArrayRef<const char *> ArgRefs = llvm::ArrayRef(LLDArgs); +- bool LLDRet = lld::elf::link(ArgRefs, LogS, LogE, false, false); ++ lld::Result LLDRet = ++ lld::lldMain(ArgRefs, LogS, LogE, {{lld::Gnu, &lld::elf::link}}); + lld::CommonLinkerContext::destroy(); +- if (!LLDRet) { ++ if (LLDRet.retCode || !LLDRet.canRunAgain) { + return AMD_COMGR_STATUS_ERROR; + } + return AMD_COMGR_STATUS_SUCCESS; diff --git a/dev-libs/rocm-comgr/files/rocm-comgr-5.7.0-metadata.patch b/dev-libs/rocm-comgr/files/rocm-comgr-5.7.0-metadata.patch new file mode 100644 index 000000000000..78fc4f34f45c --- /dev/null +++ b/dev-libs/rocm-comgr/files/rocm-comgr-5.7.0-metadata.patch @@ -0,0 +1,73 @@ +commit edea3631e2c1cd49c93f6fff883fea2affdfa2d1 +Author: Konstantin Zhuravlyov <kzhuravl_dev@outlook.com> +Date: Wed May 10 15:52:09 2023 -0400 + + Update getDesc* functions due to 689715fx + + Change-Id: I0e8058ceb8a04550fe6c17d74babcf5fe0ee609d + +diff --git a/src/comgr-metadata.cpp b/src/comgr-metadata.cpp +index a3375b4..72aeb01 100644 +--- a/src/comgr-metadata.cpp ++++ b/src/comgr-metadata.cpp +@@ -223,7 +223,7 @@ static bool mergeNoteRecords(llvm::msgpack::DocNode &From, + template <class ELFT> + static bool processNote(const Elf_Note<ELFT> &Note, DataMeta *MetaP, + llvm::msgpack::DocNode &Root) { +- auto DescString = Note.getDescAsStringRef(); ++ auto DescString = Note.getDescAsStringRef(4); + + if (Note.getName() == "AMD" && Note.getType() == ELF::NT_AMD_HSA_METADATA) { + +@@ -557,7 +557,7 @@ getElfIsaNameFromElfNotes(const ELFObjectFile<ELFT> *Obj, + + switch (Note.getType()) { + case ELF::NT_AMD_HSA_CODE_OBJECT_VERSION: { +- if (Note.getDesc().size() < ++ if (Note.getDesc(4).size() < + sizeof(amdgpu_hsa_note_code_object_version_s)) { + IsError = true; + return true; +@@ -565,7 +565,7 @@ getElfIsaNameFromElfNotes(const ELFObjectFile<ELFT> *Obj, + + const auto *NoteCodeObjectVersion = + reinterpret_cast<const amdgpu_hsa_note_code_object_version_s *>( +- Note.getDesc().data()); ++ Note.getDesc(4).data()); + + // Only code objects up to version 2 used note records. + if (NoteCodeObjectVersion->major_version > 2) { +@@ -578,7 +578,7 @@ getElfIsaNameFromElfNotes(const ELFObjectFile<ELFT> *Obj, + } + + case ELF::NT_AMD_HSA_HSAIL: { +- if (Note.getDesc().size() < sizeof(amdgpu_hsa_note_hsail_s)) { ++ if (Note.getDesc(4).size() < sizeof(amdgpu_hsa_note_hsail_s)) { + IsError = true; + return true; + } +@@ -588,21 +588,21 @@ getElfIsaNameFromElfNotes(const ELFObjectFile<ELFT> *Obj, + } + + case ELF::NT_AMD_HSA_ISA_VERSION: { +- if (Note.getDesc().size() < ++ if (Note.getDesc(4).size() < + offsetof(amdgpu_hsa_note_isa_s, vendor_and_architecture_name)) { + IsError = true; + return true; + } + + const auto *NoteIsa = reinterpret_cast<const amdgpu_hsa_note_isa_s *>( +- Note.getDesc().data()); ++ Note.getDesc(4).data()); + + if (!NoteIsa->vendor_name_size || !NoteIsa->architecture_name_size) { + IsError = true; + return true; + } + +- if (Note.getDesc().size() < ++ if (Note.getDesc(4).size() < + offsetof(amdgpu_hsa_note_isa_s, vendor_and_architecture_name) + + NoteIsa->vendor_name_size + NoteIsa->architecture_name_size) { + IsError = true; diff --git a/dev-libs/rocm-comgr/files/rocm-comgr-5.7.0-optional.patch b/dev-libs/rocm-comgr/files/rocm-comgr-5.7.0-optional.patch new file mode 100644 index 000000000000..ed52186d98ae --- /dev/null +++ b/dev-libs/rocm-comgr/files/rocm-comgr-5.7.0-optional.patch @@ -0,0 +1,113 @@ +From 9417620c9802331c4abf0cf4c57f40ec4b38a5e7 Mon Sep 17 00:00:00 2001 +From: Ron Lieberman <ron.lieberman@amd.com> +Date: Thu, 1 Jun 2023 13:19:28 -0500 +Subject: [PATCH] [llvm] change from Optional to std::optional in support of + pending llvm patch + +Change-Id: If8a03245dc88e7b7e4a628d7ce7e28c71c3268c6 +--- + lib/comgr/src/comgr-env.cpp | 2 +- + lib/comgr/src/comgr-env.h | 3 +-- + lib/comgr/src/comgr-objdump.cpp | 5 ++--- + lib/comgr/src/comgr.cpp | 2 +- + lib/comgr/src/time-stat/time-stat.cpp | 3 +-- + 5 files changed, 6 insertions(+), 9 deletions(-) + +diff --git a/src/comgr-env.cpp b/src/comgr-env.cpp +index 6ab6f0f..7575394 100644 +--- a/src/comgr-env.cpp ++++ b/src/comgr-env.cpp +@@ -50,7 +50,7 @@ bool shouldSaveTemps() { + return SaveTemps && StringRef(SaveTemps) != "0"; + } + +-Optional<StringRef> getRedirectLogs() { ++std::optional<StringRef> getRedirectLogs() { + static char *RedirectLogs = getenv("AMD_COMGR_REDIRECT_LOGS"); + if (!RedirectLogs || StringRef(RedirectLogs) == "0") { + return std::nullopt; +diff --git a/src/comgr-env.h b/src/comgr-env.h +index aef57b3..7ca644e 100644 +--- a/src/comgr-env.h ++++ b/src/comgr-env.h +@@ -36,7 +36,6 @@ + #ifndef COMGR_ENV_H + #define COMGR_ENV_H + +-#include "llvm/ADT/Optional.h" + #include "llvm/ADT/StringRef.h" + + namespace COMGR { +@@ -47,7 +46,7 @@ bool shouldSaveTemps(); + + /// If the environment requests logs be redirected, return the string identifier + /// of where to redirect. Otherwise return @p None. +-llvm::Optional<llvm::StringRef> getRedirectLogs(); ++std::optional<llvm::StringRef> getRedirectLogs(); + + /// Return whether the environment requests verbose logging. + bool shouldEmitVerboseLogs(); +diff --git a/src/comgr-objdump.cpp b/src/comgr-objdump.cpp +index ff3f996..cae7aa3 100644 +--- a/src/comgr-objdump.cpp ++++ b/src/comgr-objdump.cpp +@@ -39,7 +39,6 @@ + #include "comgr-objdump.h" + #include "comgr.h" + #include "lld/Common/TargetOptionsCommandFlags.h" +-#include "llvm/ADT/Optional.h" + #include "llvm/ADT/STLExtras.h" + #include "llvm/ADT/StringExtras.h" + #include "llvm/CodeGen/CommandFlags.h" +@@ -2145,7 +2144,7 @@ void llvm::DisassemHelper::printRawClangAST(const ObjectFile *Obj) { + ClangASTSectionName = "clangast"; + } + +- Optional<object::SectionRef> ClangASTSection; ++ std::optional<object::SectionRef> ClangASTSection; + for (auto Sec : toolSectionFilter(*Obj)) { + StringRef Name; + auto NameOrErr = Sec.getName(); +@@ -2188,7 +2187,7 @@ void llvm::DisassemHelper::printFaultMaps(const ObjectFile *Obj) { + return; + } + +- Optional<object::SectionRef> FaultMapSection; ++ std::optional<object::SectionRef> FaultMapSection; + + for (auto Sec : toolSectionFilter(*Obj)) { + StringRef Name; +diff --git a/src/comgr.cpp b/src/comgr.cpp +index e421414..9e89dc2 100644 +--- a/src/comgr.cpp ++++ b/src/comgr.cpp +@@ -1293,7 +1293,7 @@ amd_comgr_status_t AMD_COMGR_API + // Pointer to the currently selected log stream. + raw_ostream *LogP = &LogS; + +- if (Optional<StringRef> RedirectLogs = env::getRedirectLogs()) { ++ if (std::optional<StringRef> RedirectLogs = env::getRedirectLogs()) { + StringRef RedirectLog = *RedirectLogs; + if (RedirectLog == "stdout") { + LogP = &outs(); +diff --git a/src/time-stat/time-stat.cpp b/src/time-stat/time-stat.cpp +index 1df3f0e..9b24983 100644 +--- a/src/time-stat/time-stat.cpp ++++ b/src/time-stat/time-stat.cpp +@@ -5,7 +5,6 @@ + #include <system_error> + + #include "comgr-env.h" +-#include "llvm/ADT/Optional.h" + #include "llvm/ADT/StringRef.h" + #include "llvm/Support/Debug.h" + #include "llvm/Support/FileSystem.h" +@@ -29,7 +28,7 @@ static std::unique_ptr<PerfStats> PS = nullptr; + static void dump() { PS->dumpPerfStats(); } + + void GetLogFile(std::string &PerfLog) { +- if (Optional<StringRef> RedirectLogs = env::getRedirectLogs()) { ++ if (std::optional<StringRef> RedirectLogs = env::getRedirectLogs()) { + PerfLog = (*RedirectLogs).str(); + return; + } diff --git a/dev-libs/rocm-comgr/files/rocm-comgr-5.7.0-symbolizer.patch b/dev-libs/rocm-comgr/files/rocm-comgr-5.7.0-symbolizer.patch new file mode 100644 index 000000000000..9c8079042bab --- /dev/null +++ b/dev-libs/rocm-comgr/files/rocm-comgr-5.7.0-symbolizer.patch @@ -0,0 +1,39 @@ + +commit 13dfb8f01ded137f634b8b6aa8a5ce2bc3e65daf +Author: Ron Lieberman <ron.lieberman@amd.com> +Date: Sun Apr 23 07:12:23 2023 -0500 + + [symbolizer] API evolution for ErrorHandler + + Change-Id: I438358dc79195444aed0658942b23869eda8117e + +diff --git a/src/comgr-symbolizer.cpp b/src/comgr-symbolizer.cpp +index cfdeee8..36643cf 100644 +--- a/src/comgr-symbolizer.cpp ++++ b/src/comgr-symbolizer.cpp +@@ -57,6 +57,16 @@ static llvm::symbolize::PrinterConfig getDefaultPrinterConfig() { + return Config; + } + ++static llvm::symbolize::ErrorHandler symbolize_error_handler( ++ llvm::raw_string_ostream &OS) { ++ return ++ [&](const llvm::ErrorInfoBase &ErrorInfo, llvm::StringRef ErrorBanner) { ++ OS << ErrorBanner; ++ ErrorInfo.log(OS); ++ OS << '\n'; ++ }; ++} ++ + Symbolizer::Symbolizer(std::unique_ptr<ObjectFile> &&CodeObject, + PrintSymbolCallback PrintSymbol) + : CodeObject(std::move(CodeObject)), PrintSymbol(PrintSymbol) {} +@@ -93,7 +103,7 @@ amd_comgr_status_t Symbolizer::symbolize(uint64_t Address, bool IsCode, + llvm::raw_string_ostream OS(Result); + llvm::symbolize::PrinterConfig Config = getDefaultPrinterConfig(); + llvm::symbolize::Request Request{"", Address}; +- auto Printer = std::make_unique<llvm::symbolize::LLVMPrinter>(OS, OS, Config); ++ auto Printer = std::make_unique<llvm::symbolize::LLVMPrinter>(OS, symbolize_error_handler(OS), Config); + + if (IsCode) { + auto ResOrErr = SymbolizerImpl.symbolizeInlinedCode( diff --git a/dev-libs/rocm-comgr/rocm-comgr-5.7.0.ebuild b/dev-libs/rocm-comgr/rocm-comgr-5.7.0.ebuild new file mode 100644 index 000000000000..28f2b5385c71 --- /dev/null +++ b/dev-libs/rocm-comgr/rocm-comgr-5.7.0.ebuild @@ -0,0 +1,61 @@ +# Copyright 1999-2023 Gentoo Authors +# Distributed under the terms of the GNU General Public License v2 + +EAPI=8 + +inherit cmake llvm prefix + +LLVM_MAX_SLOT=17 + +if [[ ${PV} == *9999 ]] ; then + EGIT_REPO_URI="https://github.com/RadeonOpenCompute/ROCm-CompilerSupport/" + inherit git-r3 + S="${WORKDIR}/${P}/lib/comgr" +else + SRC_URI="https://github.com/RadeonOpenCompute/ROCm-CompilerSupport/archive/rocm-${PV}.tar.gz -> ${P}.tar.gz" + S="${WORKDIR}/ROCm-CompilerSupport-rocm-${PV}/lib/comgr" + KEYWORDS="~amd64" +fi + +IUSE="test" +RESTRICT="!test? ( test )" + +PATCHES=( + "${FILESDIR}/${PN}-5.1.3-rocm-path.patch" + "${FILESDIR}/0001-Specify-clang-exe-path-in-Driver-Creation.patch" + "${FILESDIR}/0001-Find-CLANG_RESOURCE_DIR-using-clang-print-resource-d.patch" + "${FILESDIR}/${PN}-5.7.0-optional.patch" + "${FILESDIR}/${PN}-5.7.0-lld.patch" + "${FILESDIR}/${PN}-5.7.0-disassembly.patch" + "${FILESDIR}/${PN}-5.7.0-metadata.patch" + "${FILESDIR}/${PN}-5.7.0-symbolizer.patch" +) + +DESCRIPTION="Radeon Open Compute Code Object Manager" +HOMEPAGE="https://github.com/RadeonOpenCompute/ROCm-CompilerSupport" +LICENSE="MIT" +SLOT="0/$(ver_cut 1-2)" + +RDEPEND=">=dev-libs/rocm-device-libs-${PV} + sys-devel/clang:${LLVM_MAX_SLOT}= + sys-devel/clang-runtime:= + sys-devel/lld:${LLVM_MAX_SLOT}=" +DEPEND="${RDEPEND}" + +CMAKE_BUILD_TYPE=Release + +src_prepare() { + sed '/sys::path::append(HIPPath/s,"hip","",' -i src/comgr-env.cpp || die + sed "/return LLVMPath;/s,LLVMPath,llvm::SmallString<128>(\"$(get_llvm_prefix ${LLVM_MAX_SLOT})\")," -i src/comgr-env.cpp || die + eapply $(prefixify_ro "${FILESDIR}"/${PN}-5.0-rocm_path.patch) + cmake_src_prepare +} + +src_configure() { + local mycmakeargs=( + -DLLVM_DIR="$(get_llvm_prefix ${LLVM_MAX_SLOT})" + -DCMAKE_STRIP="" # disable stripping defined at lib/comgr/CMakeLists.txt:58 + -DBUILD_TESTING=$(usex test ON OFF) + ) + cmake_src_configure +} |