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-rw-r--r--dev-util/intel-graphics-compiler/files/intel-graphics-compiler-1.0.14062.11-vc.patch52
1 files changed, 33 insertions, 19 deletions
diff --git a/dev-util/intel-graphics-compiler/files/intel-graphics-compiler-1.0.14062.11-vc.patch b/dev-util/intel-graphics-compiler/files/intel-graphics-compiler-1.0.14062.11-vc.patch
index 778505f08068..7fc8e4f82c11 100644
--- a/dev-util/intel-graphics-compiler/files/intel-graphics-compiler-1.0.14062.11-vc.patch
+++ b/dev-util/intel-graphics-compiler/files/intel-graphics-compiler-1.0.14062.11-vc.patch
@@ -1,59 +1,73 @@
+From 9be3363c1f9f97627566d88a56e6e612a74691b3 Mon Sep 17 00:00:00 2001
+From: Igor Gorban <igor.gorban@intel.com>
+Date: Mon, 9 Oct 2023 13:13:57 +0000
+Subject: [PATCH] Fix regression in release-build
+
+Thanks @frantisekz for point and triage problem
+---
+ .../lib/GenXCodeGen/GenXSimdCFConformance.cpp | 15 ++++++++++-----
+ 1 file changed, 10 insertions(+), 5 deletions(-)
+
+diff --git a/IGC/VectorCompiler/lib/GenXCodeGen/GenXSimdCFConformance.cpp b/IGC/VectorCompiler/lib/GenXCodeGen/GenXSimdCFConformance.cpp
+index ade15972379d..c5572e758833 100644
--- a/IGC/VectorCompiler/lib/GenXCodeGen/GenXSimdCFConformance.cpp
+++ b/IGC/VectorCompiler/lib/GenXCodeGen/GenXSimdCFConformance.cpp
-@@ -1867,11 +1867,13 @@ void GenXSimdCFConformance::ensureConformance() {
+@@ -1867,11 +1867,12 @@ void GenXSimdCFConformance::ensureConformance() {
IID != GenXIntrinsic::genx_simdcf_unmask &&
IID != GenXIntrinsic::genx_simdcf_remask) {
EMValsStack.insert(*i);
-+ #ifdef DEBUG_VERBOSE_ON
++#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
LLVM_DEBUG(if (auto *Inst = dyn_cast<Instruction>(i->getValue())) {
auto FuncName = Inst->getFunction()->getName();
- dbgs() << "Entry EMVals " << FuncName << " - ";
- i->getValue()->dump();
+- dbgs() << "Entry EMVals " << FuncName << " - ";
+- i->getValue()->dump();
++ dbgs() << "Entry EMVals " << FuncName << " - " << *Inst << "\n";
});
-+ #endif
++#endif
}
}
for (auto i = EMVals.begin(), e = EMVals.end(); i != e; ++i) {
-@@ -1919,6 +1921,7 @@ void GenXSimdCFConformance::ensureConformance() {
+@@ -1919,6 +1920,7 @@ void GenXSimdCFConformance::ensureConformance() {
// been identified in the early pass, unless passes in between have
// transformed the code in an unexpected way that has made the simd CF
// non-conformant. Give an error here if this has happened.
-+ #ifdef DEBUG_VERBOSE_ON
++#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
if (!GotosToLower.empty()) {
dbgs() << "Not empty GotosToLower:";
for (auto *Dump : GotosToLower)
-@@ -1929,6 +1932,7 @@ void GenXSimdCFConformance::ensureConformance() {
+@@ -1929,6 +1931,7 @@ void GenXSimdCFConformance::ensureConformance() {
for (auto *Dump : JoinsToLower)
Dump->dump();
}
-+ #endif
++#endif
IGC_ASSERT_EXIT_MESSAGE(
GotosToLower.empty(),
"unexpected non-conformant SIMD CF in late SIMD CF conformance pass");
-@@ -2460,8 +2464,10 @@ static bool checkAllUsesAreSelectOrWrRegion(Value *V) {
+@@ -2460,9 +2463,9 @@ static bool checkAllUsesAreSelectOrWrRegion(Value *V) {
auto User2 = cast<Instruction>(ui2->getUser());
unsigned OpNum = ui2->getOperandNo();
++ui2;
-+ #ifdef DEBUG_VERBOSE_ON
- LLVM_DEBUG(dbgs() << "checkAllUsesAreSelectOrWrRegion: for user ";
- User2->dump());
-+ #endif
-
+- LLVM_DEBUG(dbgs() << "checkAllUsesAreSelectOrWrRegion: for user ";
+- User2->dump());
+-
++#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
++ LLVM_DEBUG(dbgs() << "checkAllUsesAreSelectOrWrRegion: for user " << *User2 << "\n");
++#endif
if (isa<SelectInst>(User2))
continue;
-@@ -3006,12 +3012,14 @@ bool GenXSimdCFConformance::getConnectedVals(
+
+@@ -3006,12 +3009,14 @@ bool GenXSimdCFConformance::getConnectedVals(
}
} else {
if (!UsersToLower.empty()) {
-+ #ifdef DEBUG_VERBOSE_ON
++#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
LLVM_DEBUG(dbgs() << "getConnectedVals: find bad users:\n";
for (auto &BadUser
: UsersToLower) {
dbgs() << " ";
BadUser.dump();
});
-+ #endif
++#endif
return false;
}
}
---