3 files changed, 118 insertions, 0 deletions
diff --git a/dev-util/Manifest.gz b/dev-util/Manifest.gz
index f5bc1b0daa62..39ef01fada69 100644
--- a/dev-util/Manifest.gz
+++ b/dev-util/Manifest.gz
diff --git a/dev-util/intel_clc/Manifest b/dev-util/intel_clc/Manifest
index 5f855265e350..1e3b39764df2 100644
--- a/dev-util/intel_clc/Manifest
+++ b/dev-util/intel_clc/Manifest
@@ -2,9 +2,11 @@ DIST mesa-23.3.0-rc5.tar.xz 19227440 BLAKE2B 844eb3dacc6f579f1a7bff74fc20ec22021
 DIST mesa-23.3.0.tar.xz 19234688 BLAKE2B 1b87d15cbe1b4c761653b7042c46eac3036f08dfcf3a0a81aa7bf6c1c0c402b05f37ce8da9d88df72e1745d66a648c2b8c161b04bf558107f548f6d8167cc798 SHA512 3568b571974a2c6c0c3a4cc614c851729962e39926f0af906ba91604f9d43c0618db7df004cbec5d9e5dbade2d6bde818608c9aa1686183994d68ad3e6ac4521
 DIST mesa-23.3.1.tar.xz 19337988 BLAKE2B 73696281868e5eba6493cc34786a6c30eaf256bed2495444be9a1a5ebf1a0d4b8f00bcc3fb91ce9de3ac8ff23663e41cab17b8fe42b1048366c8e9b95aefa905 SHA512 0861fb5083e37439ad8cc0a0d8372a7c84d8665ea298dc784e2dd893162e20ae072f5ef0b860be88ecf74bc123714acbc1dec312e139b892ff40ef1887c5f4a5
 DIST mesa-23.3.2.tar.xz 19365140 BLAKE2B fc97e17dd7a139056190010325f1d57978ef8618ae87731f459daedc303223f3fbce660c2361dcd518d35c709357435366c75ebfd6366daa9f0dec99b534604f SHA512 634d2b67ade2121de3f19f2cccd4bf7ceb2ac391b9366587ed1c2412444e010de8ec14a25529fdec1f43f943096422eb23cefcb8a89d2f8b20286850188b65c3
+DIST mesa-23.3.3.tar.xz 19379484 BLAKE2B 6b57e99356abccf398c5fb84953fc1490ddf516dbeed1feca8d16344a04c1c15183325752717447a34a61dd4cdda897147e3194f869d8dbadfa5c45a0c95dab5 SHA512 bed23e8324b026edd5d2b16a381ec563cf2fa9be9c8fbe8d9fb907cab9d87eef91f493fb9d4e3973d4b679e271d2a85ce48af491585638ab97f087532fc63c30
 EBUILD intel_clc-23.3.0.ebuild 2490 BLAKE2B e26856b1c348027490d3012ab18a732d1c8216f93c3ad57df6764818ec6b8e72d4e28a98bab9346bf5d0cc78f2becf2b2b8ba8f35e545753680109eb72ed4f80 SHA512 218a4bb0b8b4f07b24162c7743dee325b65cb9751a994d53fd2dc57fe132200593b5d65ea771b00405d798fdd43dfe937abbdf8331d4317fa536748f8b21508a
 EBUILD intel_clc-23.3.0_rc5-r1.ebuild 2490 BLAKE2B e26856b1c348027490d3012ab18a732d1c8216f93c3ad57df6764818ec6b8e72d4e28a98bab9346bf5d0cc78f2becf2b2b8ba8f35e545753680109eb72ed4f80 SHA512 218a4bb0b8b4f07b24162c7743dee325b65cb9751a994d53fd2dc57fe132200593b5d65ea771b00405d798fdd43dfe937abbdf8331d4317fa536748f8b21508a
 EBUILD intel_clc-23.3.1-r1.ebuild 2518 BLAKE2B 43ad8c7de19f1953920e69caafb201eca28d4b569aefc4fcf6fa9d83a92e98c3faf2ab9bb89ce3d94fe420115d8021d5738d296d3ecc9ecca443d1d31f0a8494 SHA512 7cc1f399c0106e3ebf87da4500647c74695c9e8c0e5dec110ae8285984d964e2ed72fb5855886cf69dad4db075202be980a2d293b5f45c72c891b695467de254
 EBUILD intel_clc-23.3.2-r1.ebuild 2518 BLAKE2B e743dd64646d7ff479af1b9c71694e74a40eddcfc3f83400149e49d73c8af3cfba3dc67197b8bc2fb6c98b0f3604ce91ae7515c04d84ca8072bee9e5f1f5af5d SHA512 4ca6ab59227402ab4e2fc13cb340770efbfc77e66e22cea143b619370a473317cf73a59c298c9cd1d935de4c5f93bf55382418fcc51fb573c1e3de6c760c1f90
+EBUILD intel_clc-23.3.3.ebuild 2518 BLAKE2B e743dd64646d7ff479af1b9c71694e74a40eddcfc3f83400149e49d73c8af3cfba3dc67197b8bc2fb6c98b0f3604ce91ae7515c04d84ca8072bee9e5f1f5af5d SHA512 4ca6ab59227402ab4e2fc13cb340770efbfc77e66e22cea143b619370a473317cf73a59c298c9cd1d935de4c5f93bf55382418fcc51fb573c1e3de6c760c1f90
 EBUILD intel_clc-9999.ebuild 2518 BLAKE2B e743dd64646d7ff479af1b9c71694e74a40eddcfc3f83400149e49d73c8af3cfba3dc67197b8bc2fb6c98b0f3604ce91ae7515c04d84ca8072bee9e5f1f5af5d SHA512 4ca6ab59227402ab4e2fc13cb340770efbfc77e66e22cea143b619370a473317cf73a59c298c9cd1d935de4c5f93bf55382418fcc51fb573c1e3de6c760c1f90
 MISC metadata.xml 388 BLAKE2B 0558cfe706987a93605fb383bc2c30ff4f4cf5837ca19afd3e16d9702ea7dcd3d575579d53aacb531e1d421c8b1692eb4607d713793a89240223c031d7781a31 SHA512 e0375912a94fa92b49ed78d9a88c4eacc8b441d8b2fa117a48df2d8a958f1cf91279299aca109e24f76b27ca04f0067f83e5b8e4141f85ac64d379bca0945d2a
diff --git a/dev-util/intel_clc/intel_clc-23.3.3.ebuild b/dev-util/intel_clc/intel_clc-23.3.3.ebuild
new file mode 100644
index 000000000000..0df8ae0fd528
--- /dev/null
+++ b/dev-util/intel_clc/intel_clc-23.3.3.ebuild
@@ -0,0 +1,116 @@
+# Copyright 2023-2024 Gentoo Authors
+# Distributed under the terms of the GNU General Public License v2
+
+EAPI=8
+
+PYTHON_COMPAT=( python3_{10..12} )
+
+inherit llvm meson python-any-r1
+
+MY_PV="${PV/_/-}"
+
+DESCRIPTION="intel_clc tool used for building OpenCL C to SPIR-V"
+HOMEPAGE="https://mesa3d.org/"
+
+if [[ ${PV} == 9999 ]]; then
+	S="${WORKDIR}/intel_clc-${MY_PV}"
+	EGIT_REPO_URI="https://gitlab.freedesktop.org/mesa/mesa.git"
+	inherit git-r3
+else
+	S="${WORKDIR}/mesa-${MY_PV}"
+	SRC_URI="https://archive.mesa3d.org/mesa-${MY_PV}.tar.xz"
+	KEYWORDS="~amd64"
+fi
+
+LICENSE="MIT SGI-B-2.0"
+SLOT="0"
+IUSE="debug"
+
+RDEPEND="
+	dev-libs/libclc
+	dev-util/spirv-tools
+	>=sys-libs/zlib-1.2.8:=
+	x11-libs/libdrm
+"
+DEPEND="${RDEPEND}
+	dev-libs/expat
+"
+BDEPEND="
+	${PYTHON_DEPS}
+	$(python_gen_any_dep ">=dev-python/mako-0.8.0[\${PYTHON_USEDEP}]")
+	virtual/pkgconfig
+"
+
+# Please keep the LLVM dependency block separate. Since LLVM is slotted,
+# we need to *really* make sure we're not pulling one than more slot
+# simultaneously.
+#
+# How to use it:
+# 1. Specify LLVM_MAX_SLOT (inclusive), e.g. 17.
+# 2. Specify LLVM_MIN_SLOT (inclusive), e.g. 15.
+LLVM_MAX_SLOT="17"
+LLVM_MIN_SLOT="15"
+PER_SLOT_DEPSTR="
+	(
+		dev-util/spirv-llvm-translator:@SLOT@
+		sys-devel/clang:@SLOT@
+		sys-devel/llvm:@SLOT@
+	)
+"
+LLVM_DEPSTR="
+	|| (
+		$(for ((slot=LLVM_MAX_SLOT; slot>=LLVM_MIN_SLOT; slot--)); do
+			echo "${PER_SLOT_DEPSTR//@SLOT@/${slot}}"
+		done)
+	)
+	<sys-devel/clang-$((LLVM_MAX_SLOT + 1)):=
+	<sys-devel/llvm-$((LLVM_MAX_SLOT + 1)):=
+"
+RDEPEND="${RDEPEND}
+	${LLVM_DEPSTR}
+"
+unset LLVM_MIN_SLOT {LLVM,PER_SLOT}_DEPSTR
+
+llvm_check_deps() {
+	has_version "dev-util/spirv-llvm-translator:${LLVM_SLOT}" &&
+	has_version "sys-devel/clang:${LLVM_SLOT}" &&
+	has_version "sys-devel/llvm:${LLVM_SLOT}"
+}
+
+python_check_deps() {
+	python_has_version -b ">=dev-python/mako-0.8.0[${PYTHON_USEDEP}]"
+}
+
+pkg_setup() {
+	llvm_pkg_setup
+	python-any-r1_pkg_setup
+}
+
+src_configure() {
+	PKG_CONFIG_PATH="$(get_llvm_prefix "${LLVM_MAX_SLOT}")/$(get_libdir)/pkgconfig"
+
+	local emesonargs=(
+		-Dllvm=enabled
+		-Dshared-llvm=enabled
+		-Dintel-clc=enabled
+
+		-Dgallium-drivers=''
+		-Dvulkan-drivers=''
+
+		# Set platforms empty to avoid the default "auto" setting. If
+		# platforms is empty meson.build will add surfaceless.
+		-Dplatforms=''
+
+		-Dglx=disabled
+		-Dlibunwind=disabled
+		-Dzstd=disabled
+
+		--buildtype $(usex debug debug plain)
+		-Db_ndebug=$(usex debug false true)
+	)
+	meson_src_configure
+}
+
+src_install() {
+	dobin "${BUILD_DIR}"/src/intel/compiler/intel_clc
+}